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Searched refs:priority (Results 1 – 25 of 32) sorted by relevance

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/xen-4.10.0-shim-comet/xen/arch/arm/
A Dgic.c114 gic_hw_ops->set_irq_priority(desc, priority); in gic_set_irq_priority()
120 void gic_route_irq_to_xen(struct irq_desc *desc, unsigned int priority) in gic_route_irq_to_xen() argument
122 ASSERT(priority <= 0xff); /* Only 8 bits of priority */ in gic_route_irq_to_xen()
130 gic_set_irq_priority(desc, priority); in gic_route_irq_to_xen()
165 gic_set_irq_priority(desc, priority); in gic_route_irq_to_guest()
398 if ( iter->priority > n->priority ) in gic_add_to_lr_pending()
484 unsigned int priority) in gic_raise_guest_irq() argument
577 gic_raise_guest_irq(v, irq, p->priority); in gic_update_one_lr()
645 if ( p_r->priority == p->priority ) in gic_restore_pending_irqs()
711 if ( GIC_PRI_TO_GUEST(p->priority) >= mask_priority ) in gic_events_need_delivery()
[all …]
A Dvgic.c243 return ACCESS_ONCE(rank->priority[virq & INTERRUPT_RANK_MASK]); in vgic_get_virq_priority()
398 gic_raise_guest_irq(v_target, irq, p->priority); in vgic_enable_irqs()
513 uint8_t priority; in vgic_vcpu_inject_irq() local
543 priority = vgic_get_virq_priority(v, virq); in vgic_vcpu_inject_irq()
544 n->priority = priority; in vgic_vcpu_inject_irq()
548 gic_raise_guest_irq(v, virq, priority); in vgic_vcpu_inject_irq()
552 if ( iter->priority > priority ) in vgic_vcpu_inject_irq()
A Dgic-v3.c530 unsigned int priority) in gicv3_set_irq_priority() argument
540 writeb_relaxed(priority, GICD + GICD_IPRIORITYR + irq); in gicv3_set_irq_priority()
548 uint32_t priority; in gicv3_dist_init() local
572 priority = (GIC_PRI_IRQ << 24 | GIC_PRI_IRQ << 16 | in gicv3_dist_init()
574 writel_relaxed(priority, GICD + GICD_IPRIORITYR + (i / 4) * 4); in gicv3_dist_init()
756 uint32_t priority; in gicv3_cpu_init() local
776 priority = (GIC_PRI_IPI << 24 | GIC_PRI_IPI << 16 | GIC_PRI_IPI << 8 | in gicv3_cpu_init()
779 writel_relaxed(priority, in gicv3_cpu_init()
782 priority = (GIC_PRI_IRQ << 24 | GIC_PRI_IRQ << 16 | GIC_PRI_IRQ << 8 | in gicv3_cpu_init()
785 writel_relaxed(priority, in gicv3_cpu_init()
[all …]
A Dpercpu.c76 .priority = 100 /* highest priority */
A Dvgic-v2.c502 uint32_t *ipriorityr, priority; in vgic_v2_distr_mmio_write() local
511 priority = ACCESS_ONCE(*ipriorityr); in vgic_v2_distr_mmio_write()
512 vreg_reg32_update(&priority, r, info); in vgic_v2_distr_mmio_write()
513 ACCESS_ONCE(*ipriorityr) = priority; in vgic_v2_distr_mmio_write()
A Dgic-v2.c271 unsigned int priority) in gicv2_set_irq_priority() argument
278 writeb_gicd(priority, GICD_IPRIORITYR + irq); in gicv2_set_irq_priority()
440 ((GIC_PRI_TO_GUEST(p->priority) & GICH_V2_LR_PRIORITY_MASK) in gicv2_update_lr()
463 lr_reg->priority = (lrv >> GICH_V2_LR_PRIORITY_SHIFT) & GICH_V2_LR_PRIORITY_MASK; in gicv2_read_lr()
475 ((uint32_t)(lr_reg->priority & GICH_V2_LR_PRIORITY_MASK) in gicv2_write_lr()
A Dvgic-v3.c837 uint32_t *ipriorityr, priority; in __vgic_v3_distr_common_mmio_write() local
845 priority = ACCESS_ONCE(*ipriorityr); in __vgic_v3_distr_common_mmio_write()
846 vreg_reg32_update(&priority, r, info); in __vgic_v3_distr_common_mmio_write()
847 ACCESS_ONCE(*ipriorityr) = priority; in __vgic_v3_distr_common_mmio_write()
/xen-4.10.0-shim-comet/xen/arch/x86/hvm/
A Dvpic.c66 int cur_priority, priority, irq; in vpic_get_highest_priority_irq() local
72 priority = vpic_get_priority(vpic, mask); in vpic_get_highest_priority_irq()
73 if ( priority == VPIC_PRIO_NONE ) in vpic_get_highest_priority_irq()
76 irq = (priority + vpic->priority_add) & 7; in vpic_get_highest_priority_irq()
92 return (priority < cur_priority) ? irq : -1; in vpic_get_highest_priority_irq()
186 int priority, cmd, irq; in vpic_ioport_write() local
245 priority = vpic_get_priority(vpic, mask); in vpic_ioport_write()
246 if ( priority == VPIC_PRIO_NONE ) in vpic_ioport_write()
248 irq = (priority + vpic->priority_add) & 7; in vpic_ioport_write()
/xen-4.10.0-shim-comet/xen/common/
A Devent_fifo.c46 evtchn->priority = EVTCHN_FIFO_PRIORITY_DEFAULT; in evtchn_fifo_init()
202 q = &v->evtchn_fifo->queue[evtchn->priority]; in evtchn_fifo_set_pending()
226 evtchn->last_priority = evtchn->priority; in evtchn_fifo_set_pending()
254 && !test_and_set_bit(q->priority, in evtchn_fifo_set_pending()
318 unsigned int priority) in evtchn_fifo_set_priority() argument
320 if ( priority > EVTCHN_FIFO_PRIORITY_MIN ) in evtchn_fifo_set_priority()
328 evtchn->priority = priority; in evtchn_fifo_set_priority()
402 q->priority = i; in init_queue()
A Dnotifier.c30 if ( n->priority > nb->priority ) in notifier_chain_register()
A Dtasklet.c239 .priority = 99
A Dtimer.c630 .priority = 99
/xen-4.10.0-shim-comet/xen/include/asm-arm/
A Dgic.h212 uint8_t priority; member
229 extern void gic_route_irq_to_xen(struct irq_desc *desc, unsigned int priority);
232 unsigned int priority);
244 unsigned int priority);
338 void (*set_irq_priority)(struct irq_desc *desc, unsigned int priority);
A Dvgic.h81 uint8_t priority; member
113 uint8_t priority[32]; member
/xen-4.10.0-shim-comet/xen/include/xen/
A Devent.h163 unsigned int priority);
213 unsigned int priority) in evtchn_port_set_priority() argument
217 return d->evtchn_port_ops->set_priority(d, evtchn, priority); in evtchn_port_set_priority()
A Devent_fifo.h15 uint8_t priority; member
A Dnotifier.h28 int priority; member
A Dsched.h112 u8 priority; member
/xen-4.10.0-shim-comet/stubdom/
A Dtpmemu-0.7.4.patch12 void (*tpm_log)(int priority, const char *fmt, ...) = NULL;
/xen-4.10.0-shim-comet/xen/arch/x86/
A Dpercpu.c90 .priority = 100 /* highest priority */
/xen-4.10.0-shim-comet/docs/misc/
A Dvtd-pi.txt137 10. Multicast/broadcast and lowest priority interrupts consideration.
314 - Multicast/broadcast and lowest priority interrupts consideration.
320 2. For lowest-priority interrupts, new Intel CPU/Chipset/root-complex
322 ways (configurable by BIOS) on how the handle lowest priority interrupts:
323 A) Round robin: In this method, the chipset simply delivers lowest priority
330 CPU to route the lowest priority interrupt. This way, a given vector always goes
333 So, gist of above is that, lowest priority interrupts has never been delivered as
334 "lowest priority" in physical hardware.
/xen-4.10.0-shim-comet/docs/features/
A Dsched_credit.pandoc51 In Credit, a vCPU has a priority, a status (i.e., active or inactive),
85 * [priority handling issues](https://lists.xenproject.org/archives/html/xen-devel/2016-05/msg01362.…
/xen-4.10.0-shim-comet/xen/include/public/
A Devent_channel.h311 uint32_t priority; member
/xen-4.10.0-shim-comet/stubdom/vtpm/
A Dvtpm.c80 void vtpm_log(int priority, const char *fmt, ...) in vtpm_log() argument
82 if(opt_args.loglevel >= priority) { in vtpm_log()
/xen-4.10.0-shim-comet/docs/misc/arm/device-tree/
A Dbooting.txt70 priority of this field vs. other mechanisms of specifying the

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