| /xen-4.10.0-shim-comet/xen/arch/arm/arm32/lib/ |
| A D | memset.S | 24 1: orr r1, r1, r1, lsl #8
25 orr r1, r1, r1, lsl #16
26 mov r3, r1
36 mov r8, r1
37 mov lr, r1
64 mov r4, r1
65 mov r5, r1
66 mov r6, r1
67 mov r7, r1
68 mov r8, r1
[all …]
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| A D | memmove.S | 29 subs ip, r0, r1
34 add r1, r1, r2
39 PLD( pld [r1, #-4] )
41 ands ip, r1, #3
56 PLD( pld [r1, #-4] )
111 ldrb lr, [r1, #-1]!
117 ands ip, r1, #3
120 10: bic r1, r1, #3
122 ldr r3, [r1, #0]
177 ldr r3, [r1, #-4]!
[all …]
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| A D | memzero.S | 20 1: subs r1, r1, #4 @ 1 do we have enough
26 add r1, r1, r3 @ 1 (r1 = r1 - (4 - r3))
52 3: subs r1, r1, #64 @ 1 write 32 bytes out per loop
62 tst r1, #32 @ 1
84 cmp r1, #96
89 sub r1, r1, ip
96 3: subs r1, r1, #64
102 tst r1, #32
104 tst r1, #16
112 tst r1, #4 @ 1 4 bytes or more?
[all …]
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| A D | bitops.h | 6 ands ip, r1, #3
11 add r1, r1, r0, lsl #2 @ Get word offset
18 1: ldrex r2, [r1]
20 strex r0, r2, [r1]
31 ands ip, r1, #3
36 add r1, r1, r0, lsl #2 @ Get word offset
44 1: ldrex r2, [r1]
47 strex ip, r2, [r1]
61 ands ip, r1, #3
88 ands ip, r1, #3
[all …]
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| A D | copy_template.S | 75 PLD( pld [r1, #0] )
77 ands ip, r1, #3
92 PLD( pld [r1, #0] )
94 PLD( pld [r1, #28] )
96 PLD( pld [r1, #60] )
97 PLD( pld [r1, #92] )
168 ands ip, r1, #3
171 10: bic r1, r1, #3
191 PLD( pld [r1, #0] )
193 PLD( pld [r1, #28] )
[all …]
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| A D | lib1funcs.S | 208 subs r2, r1, #1
211 cmp r0, r1
213 tst r1, r2
225 12: ARM_DIV2_ORDER r1, r2
256 cmp r1, #0
259 rsbmi r1, r1, #0 @ loops below use unsigned.
264 cmp r3, r1
298 cmp r1, #0
300 rsbmi r1, r1, #0 @ loops below use unsigned.
329 sub r1, r1, r3
[all …]
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| A D | findbit.S | 24 teq r1, #0
34 2: cmp r2, r1 @ any more?
45 teq r1, #0
65 teq r1, #0
75 2: cmp r2, r1 @ any more?
86 teq r1, #0
103 teq r1, #0
120 teq r1, #0
137 teq r1, #0
154 teq r1, #0
[all …]
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| A D | strchr.S | 19 and r1, r1, #0xff
21 teq r2, r1
24 teq r2, r1
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| A D | lshrdi3.S | 30 #define al r1
34 #define ah r1
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| A D | memchr.S | 20 teq r3, r1
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| A D | strrchr.S | 19 teq r2, r1
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| A D | div64.S | 18 #define xl r1
23 #define xh r1
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| /xen-4.10.0-shim-comet/xen/arch/arm/arm32/ |
| A D | head.S | 146 cmp r1, r7
192 add r1, r1, r10
196 cmp r0, r1
204 teq r1, #0
277 add r1, r1, r10 /* r1 := paddr (boot_second) */
292 lsl r1, r1, #3 /* r1 := Slot offset */
301 add r1, r1, r10 /* r1 := paddr (boot_third) */
322 lsl r1, r1, #3 /* r1 := Slot offset */
340 add r1, r1, #8 /* Next slot */
608 mov r0, r1
[all …]
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| A D | debug.S | 31 ldr r1, =EARLY_UART_VIRTUAL_ADDRESS /* r1 := VA UART base address */
32 early_uart_ready r1, r2
33 early_uart_transmit r1, r0
38 ldr r1, =EARLY_UART_VIRTUAL_ADDRESS /* r1 := VA UART base address */
39 early_uart_ready r1, r2
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| A D | entry.S | 63 mrs r1, ELR_hyp
102 cmp r1, r2
214 add r4, r1, #VCPU_arch_saved_context
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| A D | domain.c | 11 C(r0,r0_usr); C(r1,r1_usr); C(r2,r2_usr); C(r3,r3_usr); \
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| /xen-4.10.0-shim-comet/xen/xsm/flask/ss/ |
| A D | mls_types.h | 54 #define mls_range_contains(r1, r2) \ argument
55 (mls_level_dom(&(r2).level[0], &(r1).level[0]) && \
56 mls_level_dom(&(r1).level[1], &(r2).level[1]))
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| /xen-4.10.0-shim-comet/xen/include/asm-arm/arm32/ |
| A D | processor.h | 13 uint32_t r1; member
65 #define __CP64(r1, r2, coproc, opc, crm) coproc, opc, r1, r2, crm argument
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| /xen-4.10.0-shim-comet/stubdom/ |
| A D | lwip.patch-cvs | 8 diff -u -p -r1.300 -r1.318
94 diff -u -p -r1.102 -r1.104
147 diff -u -p -r1.11 -r1.12
184 diff -u -p -r1.4 -r1.5
202 diff -u -p -r1.116 -r1.117
239 diff -u -p -r1.70 -r1.73
290 diff -u -p -r1.86 -r1.87
324 diff -u -p -r1.59 -r1.62
1289 diff -u -p -r1.4 -r1.5
1854 diff -u -p -r1.7 -r1.8
[all …]
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| /xen-4.10.0-shim-comet/tools/flask/policy/modules/ |
| A D | vm_role.cons | 11 # | r1 role_op r2
15 # | r1 op names
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| /xen-4.10.0-shim-comet/xen/include/asm-arm/ |
| A D | elf.h | 6 unsigned long r1; member
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| A D | vreg.h | 49 uint32_t r1 = get_user_reg(regs, cp64.reg1); in vreg_emulate_cp64() local
52 x = (uint64_t)r1 | ((uint64_t)r2 << 32); in vreg_emulate_cp64()
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| /xen-4.10.0-shim-comet/tools/flask/policy/policy/ |
| A D | mls | 38 # | r1 role_mls_op r2
48 # | r1 op names
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| /xen-4.10.0-shim-comet/xen/include/asm-arm/arm64/ |
| A D | processor.h | 27 __DECL_REG(x1, r1/*_usr*/);
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| /xen-4.10.0-shim-comet/docs/misc/arm/ |
| A D | booting.txt | 12 Xen does not require the machine type to be passed in r1. This
|