Searched refs:svm_intercept_msr (Results 1 – 3 of 3) sorted by relevance
| /xen-4.10.0-shim-comet/xen/arch/x86/cpu/ |
| A D | vpmu_amd.c | 174 svm_intercept_msr(v, counters[i], MSR_INTERCEPT_NONE); in amd_vpmu_set_msr_bitmap()
175 svm_intercept_msr(v, ctrls[i], MSR_INTERCEPT_WRITE); in amd_vpmu_set_msr_bitmap()
188 svm_intercept_msr(v, counters[i], MSR_INTERCEPT_RW); in amd_vpmu_unset_msr_bitmap()
189 svm_intercept_msr(v, ctrls[i], MSR_INTERCEPT_RW); in amd_vpmu_unset_msr_bitmap()
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| /xen-4.10.0-shim-comet/xen/include/asm-x86/hvm/svm/ |
| A D | vmcb.h | 540 void svm_intercept_msr(struct vcpu *v, uint32_t msr, int enable);
541 #define svm_disable_intercept_for_msr(v, msr) svm_intercept_msr((v), (msr), MSR_INTERCEPT_NONE)
542 #define svm_enable_intercept_for_msr(v, msr) svm_intercept_msr((v), (msr), MSR_INTERCEPT_RW)
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| /xen-4.10.0-shim-comet/xen/arch/x86/hvm/svm/ |
| A D | svm.c | 146 void svm_intercept_msr(struct vcpu *v, uint32_t msr, int flags) in svm_intercept_msr() function
179 svm_intercept_msr(v, MSR_AMD64_DR0_ADDRESS_MASK, MSR_INTERCEPT_RW); in svm_save_dr()
180 svm_intercept_msr(v, MSR_AMD64_DR1_ADDRESS_MASK, MSR_INTERCEPT_RW); in svm_save_dr()
181 svm_intercept_msr(v, MSR_AMD64_DR2_ADDRESS_MASK, MSR_INTERCEPT_RW); in svm_save_dr()
182 svm_intercept_msr(v, MSR_AMD64_DR3_ADDRESS_MASK, MSR_INTERCEPT_RW); in svm_save_dr()
210 svm_intercept_msr(v, MSR_AMD64_DR0_ADDRESS_MASK, MSR_INTERCEPT_NONE); in __restore_debug_registers()
211 svm_intercept_msr(v, MSR_AMD64_DR1_ADDRESS_MASK, MSR_INTERCEPT_NONE); in __restore_debug_registers()
212 svm_intercept_msr(v, MSR_AMD64_DR2_ADDRESS_MASK, MSR_INTERCEPT_NONE); in __restore_debug_registers()
213 svm_intercept_msr(v, MSR_AMD64_DR3_ADDRESS_MASK, MSR_INTERCEPT_NONE); in __restore_debug_registers()
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