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Searched refs:BIT_LSYS_UART_XTAL_DIV_EN (Results 1 – 3 of 3) sorted by relevance

/AliOS-Things-master/hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/fwlib/ram_hp/
A Drtl8721dhp_clk.c38 Temp &= (~(BIT_LSYS_UART_XTAL_DIV_EN |BIT_LSYS_MASK_UART_XTAL_DIV_FREQ)); in NCO2M_Init()
59 Temp |= BIT_LSYS_UART_XTAL_DIV_EN; in NCO2M_Cmd()
62 Temp &= (~BIT_LSYS_UART_XTAL_DIV_EN); in NCO2M_Cmd()
/AliOS-Things-master/hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/fwlib/ram_lp/
A Drtl8721dlp_clk.c469 Temp &= (~(BIT_LSYS_UART_XTAL_DIV_EN |BIT_LSYS_MASK_UART_XTAL_DIV_FREQ)); in NCO2M_Init()
490 Temp |= BIT_LSYS_UART_XTAL_DIV_EN; in NCO2M_Cmd()
493 Temp &= (~BIT_LSYS_UART_XTAL_DIV_EN); in NCO2M_Cmd()
/AliOS-Things-master/hardware/chip/rtl872xd/sdk/component/soc/realtek/amebad/fwlib/include/
A Drtl8721dlp_sysreg.h699 #define BIT_LSYS_UART_XTAL_DIV_EN BIT(16) /*[16] R/W 1: enable XTAL division circuit for UART … macro

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