Searched refs:SGPIO_MULTMR_CTRL (Results 1 – 2 of 2) sorted by relevance
394 SGPIOx->SGPIO_MULTMR_CTRL &= (~BIT_SGPIO_MULTMR_CEN); in SGPIO_MUL_Init()397 while(SGPIOx->SGPIO_MULTMR_CTRL & BIT_SGPIO_MULTMR_CEN) { in SGPIO_MUL_Init()407 TempVal = SGPIOx->SGPIO_MULTMR_CTRL; in SGPIO_MUL_Init()410 SGPIOx->SGPIO_MULTMR_CTRL = TempVal; in SGPIO_MUL_Init()635 SGPIOx->SGPIO_MULTMR_CTRL |= BIT_SGPIO_MULTMR_CRST; in SGPIO_MULTmr_Reset()652 SGPIOx->SGPIO_MULTMR_CTRL |= BIT_SGPIO_MULTMR_CEN; in SGPIO_MULTmr_Cmd()655 while(!(SGPIOx->SGPIO_MULTMR_CTRL & BIT_SGPIO_MULTMR_CEN)) { in SGPIO_MULTmr_Cmd()659 SGPIOx->SGPIO_MULTMR_CTRL &= (~BIT_SGPIO_MULTMR_CEN); in SGPIO_MULTmr_Cmd()662 while(SGPIOx->SGPIO_MULTMR_CTRL & BIT_SGPIO_MULTMR_CEN) { in SGPIO_MULTmr_Cmd()
1194 …__IO uint32_t SGPIO_MULTMR_CTRL; /*!< SGPIO Multiple Timer Control Register, Address offset: 0x2… member
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