Searched refs:SYS1_BASE (Results 1 – 4 of 4) sorted by relevance
47 #define GPV_CCI_GPU1 (SYS1_BASE + 0x2A004000)48 #define GPV_CCI_GPU0 (SYS1_BASE + 0x2A005000)49 #define GPV_CCI_LITTLE (SYS1_BASE + 0x2A006000)50 #define GPV_CCI_BIG (SYS1_BASE + 0x2A007000)51 #define GPV_VPU (SYS1_BASE + 0x2A243000)52 #define GPV_DPU0 (SYS1_BASE + 0x2A244000)53 #define GPV_DPU1 (SYS1_BASE + 0x2A245000)55 #define DMC_INTERNAL0 (SYS1_BASE + 0x2A500000)56 #define DMC_INTERNAL1 (SYS1_BASE + 0x2A540000)57 #define DMC_INTERNAL2 (SYS1_BASE + 0x2A580000)[all …]
20 #define SYS1_BASE UINT32_C(0xA0000000) macro84 #define TRUSTED_RAM_BASE (SYS1_BASE + 0x04000000)85 #define NONTRUSTED_RAM_BASE (SYS1_BASE + 0x06000000)86 #define SSC_BASE (SYS1_BASE + 0x2A420000)87 #define REFCLK_CNTCONTROL_BASE (SYS1_BASE + 0x2A430000)88 #define MHU_BASE (SYS1_BASE + 0x2B1F0000)
20 #define SYS1_BASE UINT32_C(0xA0000000) macro88 #define TRUSTED_RAM_BASE (SYS1_BASE + 0x04000000)89 #define NONTRUSTED_RAM_BASE (SYS1_BASE + 0x06000000)90 #define CCI_BASE (SYS1_BASE + 0x2A000000)91 #define ARACHNE_BASE (SYS1_BASE + 0x2A100000)92 #define SID_BASE (SYS1_BASE + 0x2A420000)93 #define REFCLK_CNTCONTROL_BASE (SYS1_BASE + 0x2A430000)94 #define DMC_BASE (SYS1_BASE + 0x2A500000)
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