Searched refs:control_reg1 (Results 1 – 7 of 7) sorted by relevance
/SCP-firmware-master/product/morello/scp_ramfw_soc/ |
A D | config_morello_pll.c | 25 .control_reg1 = (void *)SCP_PLL_CPU0_STAT, 34 .control_reg1 = (void *)SCP_PLL_CPU1_STAT, 43 .control_reg1 = (void *)SCP_PLL_CLUS_STAT, 52 .control_reg1 = (void *)SCP_PLL_INTERCONNECT_STAT, 61 .control_reg1 = (void *)SCP_PLL_SYSPLL_STAT, 70 .control_reg1 = (void *)SCP_PLL_DMC_STAT, 79 .control_reg1 = (void *)SCP_PLL_GPU_STAT, 88 .control_reg1 = (void *)SCP_PLL_DPU_STAT, 97 .control_reg1 = (void *)SCP_PLL_PIXEL_STAT,
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/SCP-firmware-master/product/n1sdp/scp_ramfw/ |
A D | config_n1sdp_pll.c | 24 .control_reg1 = (void *)SCP_PLL_CPU0_STAT, 33 .control_reg1 = (void *)SCP_PLL_CPU1_STAT, 42 .control_reg1 = (void *)SCP_PLL_CLUS_STAT, 51 .control_reg1 = (void *)SCP_PLL_INTERCONNECT_STAT, 60 .control_reg1 = (void *)SCP_PLL_SYSPLL_STAT, 69 .control_reg1 = (void *)SCP_PLL_DMC_STAT,
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/SCP-firmware-master/product/morello/scp_ramfw_fvp/ |
A D | config_morello_pll.c | 25 .control_reg1 = (void *)SCP_PLL_CPU0_STAT, 35 .control_reg1 = (void *)SCP_PLL_CPU1_STAT, 45 .control_reg1 = (void *)SCP_PLL_CLUS_STAT, 55 .control_reg1 = (void *)SCP_PLL_INTERCONNECT_STAT, 65 .control_reg1 = (void *)SCP_PLL_SYSPLL_STAT, 75 .control_reg1 = (void *)SCP_PLL_DMC_STAT,
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/SCP-firmware-master/product/morello/module/morello_pll/include/ |
A D | mod_morello_pll.h | 45 volatile uint32_t *const control_reg1; member
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/SCP-firmware-master/product/n1sdp/module/n1sdp_pll/include/ |
A D | mod_n1sdp_pll.h | 45 volatile uint32_t * const control_reg1; member
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/SCP-firmware-master/product/morello/module/morello_pll/src/ |
A D | mod_morello_pll.c | 158 *config->control_reg1 = in pll_set_rate() 166 while ((*config->control_reg1 & (UINT32_C(1) << PLL_LOCK_STATUS_POS)) == in pll_set_rate() 359 (ctx->config->control_reg1 == NULL) || (ctx->config->ref_rate == 0)) { in morello_pll_element_init()
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/SCP-firmware-master/product/n1sdp/module/n1sdp_pll/src/ |
A D | mod_n1sdp_pll.c | 141 *config->control_reg1 = (postdiv << PLL_POSTDIV1_POS) | in pll_set_rate() 149 while ((*config->control_reg1 & in pll_set_rate() 334 (ctx->config->control_reg1 == NULL) || (ctx->config->ref_rate == 0)) { in n1sdp_pll_element_init()
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