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Searched refs:ctrl_base (Results 1 – 6 of 6) sorted by relevance

/SCP-firmware-master/product/n1sdp/scp_ramfw/
A Dconfig_n1sdp_pcie.c22 .ctrl_base = PCIE_IP_CFG_REG_SCP_BASE,
33 .ctrl_base = CCIX_IP_CFG_REG_SCP_BASE,
/SCP-firmware-master/product/n1sdp/module/n1sdp_pcie/include/
A Dmod_n1sdp_pcie.h40 uintptr_t ctrl_base; member
/SCP-firmware-master/product/morello/module/morello_pcie/include/
A Dmod_morello_pcie.h65 uintptr_t ctrl_base; member
/SCP-firmware-master/product/morello/scp_ramfw_soc/
A Dconfig_morello_pcie.c167 .ctrl_base = PCIE_IP_CFG_REG_SCP_BASE,
181 .ctrl_base = CCIX_IP_CFG_REG_SCP_BASE,
/SCP-firmware-master/product/morello/module/morello_pcie/src/
A Dmod_morello_pcie.c667 (struct pcie_ctrl_apb_reg *)(config->ctrl_base + APB_OFFSET_CTRL_REGS); in morello_pcie_element_init()
668 dev_ctx->phy_apb = config->ctrl_base + APB_OFFSET_PHY_REGS; in morello_pcie_element_init()
/SCP-firmware-master/product/n1sdp/module/n1sdp_pcie/src/
A Dmod_n1sdp_pcie.c725 (config->ctrl_base + APB_OFFSET_CTRL_REGS); in n1sdp_pcie_element_init()
726 dev_ctx->phy_apb = config->ctrl_base + APB_OFFSET_PHY_REGS; in n1sdp_pcie_element_init()

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