Home
last modified time | relevance | path

Searched refs:CPG_PLL3CR (Results 1 – 3 of 3) sorted by relevance

/arm-trusted-firmware-2.8.0/drivers/renesas/common/ddr/ddr_b/
A Dboot_init_dram_regdef.h42 #define CPG_PLL3CR (CPG_BASE + 0x00DCU) macro
A Dboot_init_dram.c430 cpg_write_32(CPG_PLL3CR, data_mul); in pll3_control()
462 cpg_write_32(CPG_PLL3CR, data_mul); in pll3_control()
/arm-trusted-firmware-2.8.0/drivers/renesas/common/
A Dddr_regs.h250 #define CPG_PLL3CR (CPG_BASE + 0x00DCU) macro

Completed in 10 milliseconds