Searched refs:DBSC_DBTR (Results 1 – 2 of 2) sorted by relevance
| /arm-trusted-firmware-2.8.0/drivers/renesas/common/ddr/ddr_b/ |
| A D | boot_init_dram.c | 2058 mmio_write_32(DBSC_DBTR(0), RL); in dbsc_regset()
2064 mmio_write_32(DBSC_DBTR(2), 0); in dbsc_regset()
2095 mmio_write_32(DBSC_DBTR(11), in dbsc_regset()
2108 mmio_write_32(DBSC_DBTR(14), in dbsc_regset()
2126 mmio_write_32(DBSC_DBTR(16), in dbsc_regset()
2146 mmio_write_32(DBSC_DBTR(24), in dbsc_regset()
2150 mmio_write_32(DBSC_DBTR(17), in dbsc_regset()
2366 mmio_write_32(DBSC_DBTR(24), in dbsc_regset_post()
2370 mmio_write_32(DBSC_DBTR(24), in dbsc_regset_post()
2376 mmio_write_32(DBSC_DBTR(24), in dbsc_regset_post()
[all …]
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| /arm-trusted-firmware-2.8.0/drivers/renesas/common/ |
| A D | ddr_regs.h | 44 #define DBSC_DBTR(x) (0xE6790300U + 0x04U * (x)) macro
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