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Searched refs:DDRC_MRSTAT (Results 1 – 3 of 3) sorted by relevance

/arm-trusted-firmware-2.8.0/plat/imx/imx8m/ddr/
A Dddr4_dvfs.c20 while (mmio_read_32(DDRC_MRSTAT(0)) & 0x1) { in ddr4_mr_write()
51 while (mmio_read_32(DDRC_MRSTAT(0))) { in ddr4_mr_write()
A Dlpddr4_dvfs.c18 while (mmio_read_32(DDRC_MRSTAT(0)) & 0x1) in lpddr4_mr_write()
73 val = mmio_read_32(DDRC_MRSTAT(0)); in lpddr4_swffc()
/arm-trusted-firmware-2.8.0/plat/imx/imx8m/include/
A Dddrc.h20 #define DDRC_MRSTAT(X) (DDRC_IPS_BASE_ADDR(X) + 0x18) macro

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