Searched refs:DDRPHYC (Results 1 – 8 of 8) sorted by relevance
| /arm-trusted-firmware-2.8.0/drivers/st/ddr/ |
| A D | stm32mp1_ram.c | 32 ddrphy_clk = clk_get_rate(DDRPHYC); in stm32mp1_ddr_clk_enable()
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| A D | stm32mp1_ddr.c | 489 if (clk_get_rate(DDRPHYC) < 100000000U) { in stm32mp1_ddr3_dll_off()
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| /arm-trusted-firmware-2.8.0/include/dt-bindings/clock/ |
| A D | stm32mp13-clks.h | 182 #define DDRPHYC 150 macro
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| A D | stm32mp15-clks.h | 240 #define DDRPHYC 224 macro
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| /arm-trusted-firmware-2.8.0/fdts/ |
| A D | stm32mp131.dtsi | 376 <&rcc DDRPHYC>,
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| A D | stm32mp151.dtsi | 369 <&rcc DDRPHYC>,
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| /arm-trusted-firmware-2.8.0/drivers/st/clk/ |
| A D | stm32mp1_clk.c | 352 _CLK_FIXED(SEC, RCC_DDRITFCR, 4, DDRPHYC, _PLL2_R),
2338 DDRPHYC, DDRPHYCLP, in sync_earlyboot_clocks_state()
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| A D | clk-stm32mp13.c | 1832 STM32_GATE(_DDRPHYC, DDRPHYC, _PLL2R, CLK_IS_CRITICAL, GATE_DDRPHYC),
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