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Searched refs:DDRPHYCLP (Results 1 – 4 of 4) sorted by relevance

/arm-trusted-firmware-2.8.0/include/dt-bindings/clock/
A Dstm32mp13-clks.h183 #define DDRPHYCLP 151 macro
A Dstm32mp15-clks.h241 #define DDRPHYCLP 225 macro
/arm-trusted-firmware-2.8.0/drivers/st/clk/
A Dstm32mp1_clk.c353 _CLK_FIXED(SEC, RCC_DDRITFCR, 5, DDRPHYCLP, _PLL2_R),
2338 DDRPHYC, DDRPHYCLP, in sync_earlyboot_clocks_state()
A Dclk-stm32mp13.c1833 STM32_GATE(_DDRPHYCLP, DDRPHYCLP, _PLL2R, CLK_IS_CRITICAL, GATE_DDRPHYCLP),

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