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Searched refs:IPMMUPV0_IMSCTLR (Results 1 – 3 of 3) sorted by relevance

/arm-trusted-firmware-2.8.0/plat/renesas/rzg/
A Dbl2_plat_setup.c272 mmio_write_32(IPMMUPV0_IMSCTLR, IMSCTLR_DISCACHE); in bl2_plat_flush_bl31_params()
279 mmio_write_32(IPMMUPV0_IMSCTLR, IMSCTLR_DISCACHE); in bl2_plat_flush_bl31_params()
284 mmio_write_32(IPMMUPV0_IMSCTLR, IMSCTLR_DISCACHE); in bl2_plat_flush_bl31_params()
/arm-trusted-firmware-2.8.0/plat/renesas/rcar/
A Dbl2_plat_setup.c281 mmio_write_32(IPMMUPV0_IMSCTLR, IMSCTLR_DISCACHE); in bl2_plat_flush_bl31_params()
288 mmio_write_32(IPMMUPV0_IMSCTLR, IMSCTLR_DISCACHE); in bl2_plat_flush_bl31_params()
293 mmio_write_32(IPMMUPV0_IMSCTLR, IMSCTLR_DISCACHE); in bl2_plat_flush_bl31_params()
/arm-trusted-firmware-2.8.0/plat/renesas/common/include/
A Drcar_def.h255 #define IPMMUPV0_IMSCTLR (IPMMU_PV0_BASE + 0x0500U) macro

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