Searched refs:PFC_DRVCTRL20 (Results 1 – 8 of 8) sorted by relevance
201 #define PFC_DRVCTRL20 (PFC_BASE + 0x0350U) macro
1075 reg = mmio_read_32(PFC_DRVCTRL20); in pfc_init_h3_v1()1084 pfc_reg_write(PFC_DRVCTRL20, reg); in pfc_init_h3_v1()
1108 reg = mmio_read_32(PFC_DRVCTRL20); in pfc_init_h3_v2()1117 pfc_reg_write(PFC_DRVCTRL20, reg); in pfc_init_h3_v2()
1110 reg = mmio_read_32(PFC_DRVCTRL20); in pfc_init_m3n()1119 pfc_reg_write(PFC_DRVCTRL20, reg); in pfc_init_m3n()
1194 reg = mmio_read_32(PFC_DRVCTRL20); in pfc_init_g2h()1204 pfc_reg_write(PFC_DRVCTRL20, reg); in pfc_init_g2h()
1190 reg = mmio_read_32(PFC_DRVCTRL20); in pfc_init_g2n()1200 pfc_reg_write(PFC_DRVCTRL20, reg); in pfc_init_g2n()
1203 reg = mmio_read_32(PFC_DRVCTRL20); in pfc_init_m3()1212 pfc_reg_write(PFC_DRVCTRL20, reg); in pfc_init_m3()
1192 reg = mmio_read_32(PFC_DRVCTRL20); in pfc_init_g2m()1201 pfc_reg_write(PFC_DRVCTRL20, reg); in pfc_init_g2m()
Completed in 33 milliseconds