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Searched refs:SMSTPCR4 (Results 1 – 2 of 2) sorted by relevance

/arm-trusted-firmware-2.8.0/plat/renesas/common/
A Dbl2_cpg_init.c142 cpg_write(SMSTPCR4, 0x80000000U | (mmio_read_32(SMSTPCR4) & 0x4)); in bl2_system_cpg_init_h3()
178 cpg_write(SMSTPCR4, 0x80000000U | (mmio_read_32(SMSTPCR4) & 0x4)); in bl2_system_cpg_init_m3()
214 cpg_write(SMSTPCR4, 0x80000000U | (mmio_read_32(SMSTPCR4) & 0x4)); in bl2_system_cpg_init_m3n()
248 cpg_write(SMSTPCR4, 0x80000000U | (mmio_read_32(SMSTPCR4) & 0x4)); in bl2_system_cpg_init_v3m()
282 cpg_write(SMSTPCR4, 0x80000000U | (mmio_read_32(SMSTPCR4) & 0x4)); in bl2_system_cpg_init_e3()
301 cpg_write(SMSTPCR4, 0x00000080U | (mmio_read_32(SMSTPCR4) & 0x4)); in bl2_system_cpg_init_d3()
/arm-trusted-firmware-2.8.0/plat/renesas/common/include/registers/
A Dcpg_registers.h126 #define SMSTPCR4 (CPG_BASE + 0x0140U) macro

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