Home
last modified time | relevance | path

Searched refs:clk_sel0 (Results 1 – 3 of 3) sorted by relevance

/arm-trusted-firmware-2.8.0/plat/rockchip/rk3328/drivers/pmu/
A Dpmu.h19 uint32_t clk_sel0, clk_sel1, clk_sel18, member
A Dpmu.c371 ddr_data.clk_sel0 = mmio_read_32(CRU_BASE + CRU_CLKSEL_CON(0)); in pm_plls_suspend()
434 ddr_data.clk_sel0 | BITS_WMSK(0x1f, 0)); in pm_plls_resume()
/arm-trusted-firmware-2.8.0/plat/rockchip/px30/drivers/pmu/
A Dpmu.c53 uint32_t clk_sel0; member
935 ddr_data.clk_sel0 = mmio_read_32(CRU_BASE + CRU_CLKSELS_CON(0)); in pm_plls_suspend()
955 ddr_data.clk_sel0 | BITS_WMSK(0xf, 8)); in pm_plls_resume()
959 ddr_data.clk_sel0 | BITS_WMSK(0xf, 0)); in pm_plls_resume()

Completed in 6 milliseconds