| /arm-trusted-firmware-2.8.0/plat/imx/imx8qx/ |
| A D | imx8qx_psci.c | 68 unsigned int cpu_id; in imx_pwr_domain_on() local
70 cpu_id = MPIDR_AFFLVL0_VAL(mpidr); in imx_pwr_domain_on()
72 printf("imx_pwr_domain_on cpu_id %d\n", cpu_id); in imx_pwr_domain_on()
76 ERROR("core %d power on failed!\n", cpu_id); in imx_pwr_domain_on()
82 ERROR("boot core %d failed!\n", cpu_id); in imx_pwr_domain_on()
103 unsigned int cpu_id = MPIDR_AFFLVL0_VAL(mpidr); in imx_pwr_domain_off() local
108 printf("turn off core:%d\n", cpu_id); in imx_pwr_domain_off()
114 unsigned int cpu_id = MPIDR_AFFLVL0_VAL(mpidr); in imx_domain_suspend() local
134 plat_gic_save(cpu_id, &imx_gicv3_ctx); in imx_domain_suspend()
167 unsigned int cpu_id = MPIDR_AFFLVL0_VAL(mpidr); in imx_domain_suspend_finish() local
[all …]
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| /arm-trusted-firmware-2.8.0/plat/marvell/armada/a8k/common/ |
| A D | plat_pm.c | 90 #define PWRC_CPUN_CR_REG(cpu_id) \ argument
91 (MVEBU_REGS_BASE + 0x680000 + (cpu_id * 0x10))
100 #define CCU_B_PRCRN_REG(cpu_id) \ argument
102 ((cpu_id / 2) * (0x400)) + ((cpu_id % 2) * 4))
124 INFO("Powering down CPU%d\n", cpu_id); in plat_marvell_cpu_powerdown()
230 int cpu_id = MPIDR_CPU_GET(mpidr), in plat_marvell_cpu_powerup() local
235 cpu_id = cluster * PLAT_MARVELL_CLUSTER_CORE_COUNT + cpu_id; in plat_marvell_cpu_powerup()
237 INFO("Powering on CPU%d\n", cpu_id); in plat_marvell_cpu_powerup()
313 int cpu_id; in plat_marvell_cpu_on() local
320 cpu_id = MPIDR_CPU_GET(mpidr); in plat_marvell_cpu_on()
[all …]
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| /arm-trusted-firmware-2.8.0/plat/rockchip/common/ |
| A D | plat_topology.c | 24 unsigned int cluster_id, cpu_id; in plat_core_pos_by_mpidr() local
26 cpu_id = mpidr & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
33 cpu_id += (cluster_id >> PLAT_RK_CLST_TO_CPUID_SHIFT); in plat_core_pos_by_mpidr()
35 if (cpu_id >= PLATFORM_CORE_COUNT) in plat_core_pos_by_mpidr()
38 return cpu_id; in plat_core_pos_by_mpidr()
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| /arm-trusted-firmware-2.8.0/plat/renesas/common/ |
| A D | plat_topology.c | 26 unsigned int cluster_id, cpu_id; in plat_core_pos_by_mpidr() local
34 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
39 if (cluster_id == 0 && cpu_id >= PLATFORM_CLUSTER0_CORE_COUNT) in plat_core_pos_by_mpidr()
42 if (cluster_id == 1 && cpu_id >= PLATFORM_CLUSTER1_CORE_COUNT) in plat_core_pos_by_mpidr()
45 return (cpu_id + cluster_id * PLATFORM_CLUSTER0_CORE_COUNT); in plat_core_pos_by_mpidr()
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| /arm-trusted-firmware-2.8.0/plat/intel/soc/common/ |
| A D | socfpga_topology.c | 29 unsigned int cluster_id, cpu_id; in plat_core_pos_by_mpidr() local
37 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
46 if (cpu_id >= PLATFORM_MAX_CPUS_PER_CLUSTER) in plat_core_pos_by_mpidr()
49 return (cpu_id + (cluster_id * 4)); in plat_core_pos_by_mpidr()
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| /arm-trusted-firmware-2.8.0/plat/imx/common/ |
| A D | imx8_topology.c | 25 unsigned int cluster_id, cpu_id; in plat_core_pos_by_mpidr() local
33 cpu_id = MPIDR_AFFLVL0_VAL(mpidr); in plat_core_pos_by_mpidr()
36 cpu_id > PLATFORM_MAX_CPU_PER_CLUSTER) in plat_core_pos_by_mpidr()
39 return (cpu_id + (cluster_id * 4)); in plat_core_pos_by_mpidr()
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| /arm-trusted-firmware-2.8.0/plat/arm/board/a5ds/ |
| A D | a5ds_topology.c | 31 unsigned int cluster_id, cpu_id; in plat_core_pos_by_mpidr() local
39 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
48 if (cpu_id >= A5DS_MAX_CPUS_PER_CLUSTER) in plat_core_pos_by_mpidr()
51 return (cpu_id + (cluster_id * 4)); in plat_core_pos_by_mpidr()
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| /arm-trusted-firmware-2.8.0/plat/hisilicon/hikey/ |
| A D | hikey_topology.c | 45 unsigned int cluster_id, cpu_id; in plat_core_pos_by_mpidr() local
53 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
62 if (cpu_id >= PLATFORM_CORE_COUNT_PER_CLUSTER) in plat_core_pos_by_mpidr()
65 return (cpu_id + (cluster_id * 4)); in plat_core_pos_by_mpidr()
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| /arm-trusted-firmware-2.8.0/plat/hisilicon/hikey960/ |
| A D | hikey960_topology.c | 45 unsigned int cluster_id, cpu_id; in plat_core_pos_by_mpidr() local
53 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
62 if (cpu_id >= PLATFORM_CORE_COUNT_PER_CLUSTER) in plat_core_pos_by_mpidr()
65 return (cpu_id + (cluster_id * 4)); in plat_core_pos_by_mpidr()
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| /arm-trusted-firmware-2.8.0/plat/mediatek/mt8173/ |
| A D | plat_topology.c | 39 unsigned int cluster_id, cpu_id; in plat_core_pos_by_mpidr() local
47 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
56 if (cpu_id >= PLATFORM_MAX_CPUS_PER_CLUSTER) in plat_core_pos_by_mpidr()
59 return (cpu_id + (cluster_id * 4)); in plat_core_pos_by_mpidr()
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| /arm-trusted-firmware-2.8.0/plat/mediatek/mt8183/ |
| A D | plat_topology.c | 38 unsigned int cluster_id, cpu_id; in plat_core_pos_by_mpidr() local
46 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
55 if (cpu_id >= PLATFORM_MAX_CPUS_PER_CLUSTER) in plat_core_pos_by_mpidr()
58 return (cpu_id + (cluster_id * 4)); in plat_core_pos_by_mpidr()
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| /arm-trusted-firmware-2.8.0/plat/st/stm32mp1/ |
| A D | stm32mp1_topology.c | 32 unsigned int cluster_id, cpu_id; in plat_core_pos_by_mpidr() local
42 cpu_id = (mpidr_copy >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
52 if (cpu_id >= PLATFORM_CORE_COUNT) { in plat_core_pos_by_mpidr()
56 return (int)cpu_id; in plat_core_pos_by_mpidr()
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| /arm-trusted-firmware-2.8.0/plat/xilinx/versal_net/ |
| A D | plat_topology.c | 43 uint32_t cluster_id, cpu_id; in plat_core_pos_by_mpidr() local
48 cpu_id = MPIDR_AFFLVL1_VAL(mpidr); in plat_core_pos_by_mpidr()
58 if (cpu_id >= PLATFORM_CORE_COUNT_PER_CLUSTER) { in plat_core_pos_by_mpidr()
62 return (cpu_id + (cluster_id * PLATFORM_CORE_COUNT_PER_CLUSTER)); in plat_core_pos_by_mpidr()
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| A D | plat_psci_pm.c | 28 uint32_t cpu_id = plat_core_pos_by_mpidr(mpidr); in versal_net_pwr_domain_on() local
32 __func__, mpidr, cpu_id); in versal_net_pwr_domain_on()
34 if (cpu_id == -1) { in versal_net_pwr_domain_on()
38 proc = pm_get_proc(cpu_id); in versal_net_pwr_domain_on()
59 uint32_t cpu_id = plat_my_core_pos(); in versal_net_pwr_domain_off() local
60 const struct pm_proc *proc = pm_get_proc(cpu_id); in versal_net_pwr_domain_off()
106 uint32_t cpu_id = plat_my_core_pos(); in versal_net_pwr_domain_suspend() local
107 const struct pm_proc *proc = pm_get_proc(cpu_id); in versal_net_pwr_domain_suspend()
149 uint32_t cpu_id = plat_my_core_pos(); in versal_net_pwr_domain_suspend_finish() local
150 const struct pm_proc *proc = pm_get_proc(cpu_id); in versal_net_pwr_domain_suspend_finish()
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| /arm-trusted-firmware-2.8.0/plat/rockchip/rk3328/drivers/pmu/ |
| A D | pmu.c | 58 cpu_pd = PD_CPU0 + cpu_id; in cpus_power_domain_on()
90 cpu_pd = PD_CPU0 + cpu_id; in cpus_power_domain_off()
140 assert(cpu_id < PLATFORM_CORE_COUNT); in rockchip_soc_cores_pwr_dm_on()
141 assert(cpuson_flags[cpu_id] == 0); in rockchip_soc_cores_pwr_dm_on()
146 cpus_power_domain_on(cpu_id); in rockchip_soc_cores_pwr_dm_on()
153 uint32_t cpu_id = plat_my_core_pos(); in rockchip_soc_cores_pwr_dm_off() local
162 uint32_t cpu_id = plat_my_core_pos(); in rockchip_soc_cores_pwr_dm_suspend() local
164 assert(cpu_id < PLATFORM_CORE_COUNT); in rockchip_soc_cores_pwr_dm_suspend()
165 assert(cpuson_flags[cpu_id] == 0); in rockchip_soc_cores_pwr_dm_suspend()
177 uint32_t cpu_id = plat_my_core_pos(); in rockchip_soc_cores_pwr_dm_on_finish() local
[all …]
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| /arm-trusted-firmware-2.8.0/plat/mediatek/mt8192/ |
| A D | plat_topology.c | 43 unsigned int cluster_id, cpu_id; in plat_core_pos_by_mpidr() local
60 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
70 if (cpu_id >= PLATFORM_MAX_CPUS_PER_CLUSTER) { in plat_core_pos_by_mpidr()
74 return (cpu_id + (cluster_id * 8)); in plat_core_pos_by_mpidr()
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| /arm-trusted-firmware-2.8.0/plat/mediatek/mt8195/ |
| A D | plat_topology.c | 38 unsigned int cluster_id, cpu_id; in plat_core_pos_by_mpidr() local
55 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
65 if (cpu_id >= PLATFORM_MAX_CPUS_PER_CLUSTER) { in plat_core_pos_by_mpidr()
69 return (cpu_id + (cluster_id * 8)); in plat_core_pos_by_mpidr()
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| /arm-trusted-firmware-2.8.0/plat/mediatek/mt8186/ |
| A D | plat_topology.c | 38 unsigned int cluster_id, cpu_id; in plat_core_pos_by_mpidr() local
55 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
65 if (cpu_id >= PLATFORM_MAX_CPUS_PER_CLUSTER) { in plat_core_pos_by_mpidr()
69 return (cpu_id + (cluster_id * 8)); in plat_core_pos_by_mpidr()
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| /arm-trusted-firmware-2.8.0/plat/nvidia/tegra/drivers/flowctrl/ |
| A D | flowctrl.c | 47 static inline void tegra_fc_cc4_ctrl(int cpu_id, uint32_t val) in tegra_fc_cc4_ctrl() argument
49 mmio_write_32(flowctrl_offset_cc4_ctrl[cpu_id], val); in tegra_fc_cc4_ctrl()
50 val = mmio_read_32(flowctrl_offset_cc4_ctrl[cpu_id]); in tegra_fc_cc4_ctrl()
53 static inline void tegra_fc_cpu_csr(int cpu_id, uint32_t val) in tegra_fc_cpu_csr() argument
55 mmio_write_32(flowctrl_offset_cpu_csr[cpu_id], val); in tegra_fc_cpu_csr()
56 val = mmio_read_32(flowctrl_offset_cpu_csr[cpu_id]); in tegra_fc_cpu_csr()
59 static inline void tegra_fc_halt_cpu(int cpu_id, uint32_t val) in tegra_fc_halt_cpu() argument
61 mmio_write_32(flowctrl_offset_halt_cpu[cpu_id], val); in tegra_fc_halt_cpu()
62 val = mmio_read_32(flowctrl_offset_halt_cpu[cpu_id]); in tegra_fc_halt_cpu()
72 tegra_fc_halt_cpu(cpu_id, val); in tegra_fc_prepare_suspend()
[all …]
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| /arm-trusted-firmware-2.8.0/plat/imx/imx8qm/ |
| A D | imx8qm_psci.c | 78 unsigned int cpu_id = MPIDR_AFFLVL0_VAL(mpidr); in imx_pwr_domain_on() local
87 ap_core_index[cpu_id + PLATFORM_CLUSTER0_CORE_COUNT * cluster_id], in imx_pwr_domain_on()
94 ap_core_index[cpu_id + PLATFORM_CLUSTER0_CORE_COUNT * cluster_id], in imx_pwr_domain_on()
118 unsigned int cpu_id = MPIDR_AFFLVL0_VAL(mpidr); in imx_pwr_domain_off() local
122 ap_core_index[cpu_id + PLATFORM_CLUSTER0_CORE_COUNT * cluster_id], in imx_pwr_domain_off()
130 printf("turn off cluster:%d core:%d\n", cluster_id, cpu_id); in imx_pwr_domain_off()
137 unsigned int cpu_id = MPIDR_AFFLVL0_VAL(mpidr); in imx_domain_suspend() local
142 ap_core_index[cpu_id + PLATFORM_CLUSTER0_CORE_COUNT * cluster_id], in imx_domain_suspend()
163 plat_gic_save(cpu_id, &imx_gicv3_ctx); in imx_domain_suspend()
213 unsigned int cpu_id = MPIDR_AFFLVL0_VAL(mpidr); in imx_domain_suspend_finish() local
[all …]
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| /arm-trusted-firmware-2.8.0/plat/rockchip/rk3288/drivers/pmu/ |
| A D | pmu.c | 208 static int cpus_power_domain_on(uint32_t cpu_id) in cpus_power_domain_on() argument
212 cpu_pd = PD_CPU0 + cpu_id; in cpus_power_domain_on()
218 BIT(cpu_id) | (BIT(cpu_id) << 16)); in cpus_power_domain_on()
233 uint32_t cpu_pd = PD_CPU0 + cpu_id; in cpus_power_domain_off()
238 if (check_cpu_wfie(cpu_id, CKECK_WFEI_MSK)) in cpus_power_domain_off()
243 BIT(cpu_id) | (BIT(cpu_id) << 16)); in cpus_power_domain_off()
280 assert(cpu_id < PLATFORM_CORE_COUNT); in rockchip_soc_cores_pwr_dm_on()
281 assert(cpuson_flags[cpu_id] == 0); in rockchip_soc_cores_pwr_dm_on()
282 cpuson_flags[cpu_id] = PMU_CPU_HOTPLUG; in rockchip_soc_cores_pwr_dm_on()
283 cpuson_entry_point[cpu_id] = entrypoint; in rockchip_soc_cores_pwr_dm_on()
[all …]
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| /arm-trusted-firmware-2.8.0/plat/xilinx/versal/ |
| A D | plat_psci.c | 24 int32_t cpu_id = plat_core_pos_by_mpidr(mpidr); in versal_pwr_domain_on() local
29 if (cpu_id == -1) { in versal_pwr_domain_on()
33 proc = pm_get_proc((uint32_t)cpu_id); in versal_pwr_domain_on()
54 uint32_t cpu_id = plat_my_core_pos(); in versal_pwr_domain_suspend() local
55 const struct pm_proc *proc = pm_get_proc(cpu_id); in versal_pwr_domain_suspend()
91 uint32_t cpu_id = plat_my_core_pos(); in versal_pwr_domain_suspend_finish() local
92 const struct pm_proc *proc = pm_get_proc(cpu_id); in versal_pwr_domain_suspend_finish()
159 uint32_t cpu_id = plat_my_core_pos(); in versal_pwr_domain_off() local
160 const struct pm_proc *proc = pm_get_proc(cpu_id); in versal_pwr_domain_off()
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| /arm-trusted-firmware-2.8.0/plat/arm/common/ |
| A D | arm_topology.c | 19 unsigned int cluster_id, cpu_id; in arm_check_mpidr() local
30 cpu_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK; in arm_check_mpidr()
36 cpu_id = (unsigned int) ((mpidr >> MPIDR_AFF0_SHIFT) & in arm_check_mpidr()
49 if (cpu_id >= plat_arm_get_cluster_core_count(mpidr)) in arm_check_mpidr()
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| /arm-trusted-firmware-2.8.0/plat/xilinx/zynqmp/ |
| A D | plat_psci.c | 34 uint32_t cpu_id = plat_core_pos_by_mpidr(mpidr); in zynqmp_pwr_domain_on() local
41 if (cpu_id == -1) { in zynqmp_pwr_domain_on()
44 proc = pm_get_proc(cpu_id); in zynqmp_pwr_domain_on()
63 uint32_t cpu_id = plat_my_core_pos(); in zynqmp_pwr_domain_off() local
64 const struct pm_proc *proc = pm_get_proc(cpu_id); in zynqmp_pwr_domain_off()
88 uint32_t cpu_id = plat_my_core_pos(); in zynqmp_pwr_domain_suspend() local
89 const struct pm_proc *proc = pm_get_proc(cpu_id); in zynqmp_pwr_domain_suspend()
120 uint32_t cpu_id = plat_my_core_pos(); in zynqmp_pwr_domain_suspend_finish() local
121 const struct pm_proc *proc = pm_get_proc(cpu_id); in zynqmp_pwr_domain_suspend_finish()
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| /arm-trusted-firmware-2.8.0/plat/rockchip/common/drivers/pmu/ |
| A D | pmu_com.h | 80 static int check_cpu_wfie(uint32_t cpu_id, uint32_t wfie_msk) in check_cpu_wfie() argument
84 if (cpu_id >= PLATFORM_CLUSTER0_CORE_COUNT) { in check_cpu_wfie()
86 cpu_id -= PLATFORM_CLUSTER0_CORE_COUNT; in check_cpu_wfie()
103 wfie_msk <<= (clstb_cpu_wfe + cpu_id); in check_cpu_wfie()
105 wfie_msk <<= (clstl_cpu_wfe + cpu_id); in check_cpu_wfie()
115 cluster_id, cpu_id, wfie_msk); in check_cpu_wfie()
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