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/arm-trusted-firmware-2.8.0/plat/renesas/common/
A Drcar_common.c55 unsigned int fixed = 0; in plat_ea_handler() local
57 fixed |= rcar_pcie_fixup(0); in plat_ea_handler()
58 fixed |= rcar_pcie_fixup(1); in plat_ea_handler()
60 if (fixed) in plat_ea_handler()
/arm-trusted-firmware-2.8.0/fdts/
A Da5ds.dts68 compatible = "fixed-clock";
75 compatible = "fixed-clock";
82 compatible = "fixed-clock";
139 v2m_fixed_3v3: fixed-regulator-0 {
140 compatible = "regulator-fixed";
A Dfvp-foundation-motherboard.dtsi21 compatible = "fixed-clock";
28 compatible = "fixed-clock";
35 compatible = "fixed-clock";
135 compatible = "regulator-fixed";
A Dcorstone700.dtsi51 compatible = "fixed-clock";
59 compatible = "fixed-clock";
67 compatible = "fixed-clock";
A Dn1sdp-single-chip.dts34 compatible = "fixed-clock";
41 compatible = "fixed-clock";
A Dmorello.dtsi85 compatible = "fixed-clock";
92 compatible = "fixed-clock";
A Dstm32mp15xx-dhcor-io1v8.dtsi11 compatible = "regulator-fixed";
A Drtsm_ve-motherboard.dtsi14 compatible = "fixed-clock";
21 compatible = "fixed-clock";
28 compatible = "fixed-clock";
35 compatible = "regulator-fixed";
A Darm_fpga.dts68 compatible = "fixed-clock";
75 compatible = "fixed-clock";
A Dtc.dts310 compatible = "fixed-clock";
317 compatible = "fixed-clock";
324 compatible = "fixed-clock";
389 compatible = "fixed-clock";
418 compatible = "fixed-clock";
438 compatible = "regulator-fixed";
A Dstm32mp131.dtsi32 compatible = "fixed-clock";
38 compatible = "fixed-clock";
44 compatible = "fixed-clock";
50 compatible = "fixed-clock";
56 compatible = "fixed-clock";
A Dstm32mp157c-lxa-mc1.dts40 compatible = "regulator-fixed";
A Dn1sdp.dtsi71 compatible = "fixed-clock";
78 compatible = "fixed-clock";
A Dfvp-ve-Cortex-A7x1.dts64 compatible = "fixed-clock";
A Dstm32mp151.dtsi43 compatible = "fixed-clock";
49 compatible = "fixed-clock";
55 compatible = "fixed-clock";
61 compatible = "fixed-clock";
67 compatible = "fixed-clock";
A Dstm32mp135f-dk.dts36 compatible = "regulator-fixed";
44 compatible = "regulator-fixed";
A Dmorello-fvp.dts156 compatible = "fixed-clock";
A Dmorello-soc.dts210 compatible = "fixed-clock";
A Dstm32mp157c-odyssey-som.dtsi22 compatible = "regulator-fixed";
A Dstm32mp15xx-dkx.dtsi17 compatible = "regulator-fixed";
/arm-trusted-firmware-2.8.0/docs/design/
A Dcpu-specific-build-macros.rst491 of the CPU and is fixed in r2p1.
495 of the CPU and is fixed in r2p1.
499 and is fixed in r2p1.
503 of the CPU and is fixed in r2p1.
507 of the CPU and is fixed in r2p1.
511 of the CPU and is fixed in r2p1.
515 of the CPU and is fixed in r2p1.
592 it is fixed in r2p1.
602 of the CPU, it is fixed in r1p1.
608 fixed in r0p1.
[all …]
/arm-trusted-firmware-2.8.0/docs/security_advisories/
A Dsecurity-advisory-tfv-5.rst50 NOTE: The original pull request referenced above only fixed the issue for S-EL1
51 whereas the EL3 was fixed in the later commits.
/arm-trusted-firmware-2.8.0/drivers/st/clk/
A Dstm32mp1_clk.c244 uint8_t fixed; /* Relates to enum stm32mp1_parent_id */ member
276 .fixed = _UNKNOWN_ID, \
288 .fixed = (f), \
300 .fixed = _UNKNOWN_ID, \
312 .fixed = (f), \
734 return (enum stm32mp1_parent_id)(gate_ref(i)->fixed); in stm32mp1_clk_get_fixed_parent()
/arm-trusted-firmware-2.8.0/docs/threat_model/
A Dthreat_model_fvp_r.rst89 fvp_r implementation is limited to BL1, since BL1's regions are fixed,
/arm-trusted-firmware-2.8.0/docs/plat/
A Dqti-msm8916.rst50 use KVM or another hypervisor. The entry address is fixed in the BL31 binary

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