Searched refs:operations (Results 1 – 22 of 22) sorted by relevance
| /arm-trusted-firmware-2.8.0/plat/nvidia/tegra/soc/t186/drivers/se/ |
| A D | se.c | 130 uint32_t operations; in tegra_se_calculate_sha256_hash() local
191 for (operations = 1U; operations <= number_of_operations; in tegra_se_calculate_sha256_hash()
192 operations++) { in tegra_se_calculate_sha256_hash()
193 if (operations == SHA_FIRST_OP) { in tegra_se_calculate_sha256_hash()
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| /arm-trusted-firmware-2.8.0/plat/nvidia/tegra/soc/t194/drivers/se/ |
| A D | se.c | 277 uint32_t operations; in tegra_se_calculate_sha256_hash() local
338 for (operations = 1U; operations <= number_of_operations; in tegra_se_calculate_sha256_hash()
339 operations++) { in tegra_se_calculate_sha256_hash()
340 if (operations == SHA_FIRST_OP) { in tegra_se_calculate_sha256_hash()
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| /arm-trusted-firmware-2.8.0/docs/resources/diagrams/plantuml/ |
| A D | io_arm_class_diagram.puml | 59 .. synchronous operations ..
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| /arm-trusted-firmware-2.8.0/docs/getting_started/ |
| A D | tools-build.rst | 46 For advanced operations on FIP files, it is also possible to independently build
110 remove operations will automatically overwrite it.
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| A D | psci-lib-integration-guide.rst | 235 management operations. This function is used to register the ``spd_pm_ops_t``
299 cpu operations (cpu_ops) and per-cpu data framework. Other helper library
312 and some helper utilities for assert, print and memory operations as listed
432 All platform specific operations for power management are done via
443 During PSCI power management operations, the EL3 Runtime Software may
513 CPU operations
516 The CPU operations (cpu_ops) framework implement power down sequence specific
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| A D | build-options.rst | 168 operations when entering/exiting an EL2 execution context. This is of primary
260 to EL3 context save/restore operations. This flag can take the values 0 to 2,
273 register during EL2 context save/restore operations. ``FEAT_CSV2_2`` is an
286 Physical Offset register) during EL2 to EL3 context save/restore operations.
293 Read Trap Register) during EL2 to EL3 context save/restore operations.
300 well as adding HCRX_EL2 to the EL2 context save/restore operations. Its a
346 during EL2 context save/restore operations.``FEAT_VHE`` is a mandatory
579 software operations are required for CPUs to enter and exit coherency.
582 operations, and the rest is managed in hardware, minimizing active software
584 build and run-time optimizations during boot and power management operations.
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| A D | porting-guide.rst | 145 Defines the maximum power domain level that the power management operations
149 management operations in the system that the platform implements. For
1130 Further I/O layer operations such as I/O open, I/O read, etc. on these
1502 - This function indicates whether cache management operations should be
1639 platform specific clean up or bookkeeping operations before transferring
2026 operations before transferring control to the next image. This function
2844 overhead of explicit cache maintainace operations.
3478 initialize storage devices before IO operations are called.
3482 The basic operations supported by the layer
3484 Drivers do not have to implement all operations, but each platform must
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| /arm-trusted-firmware-2.8.0/docs/ |
| A D | glossary.rst | 193 performing speculative operations.
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| A D | change-log.md | 3804 - Added support for power management operations
5679 hardware, reducing complexity of the software operations.
5690 the GICv3 implementations to have power management operations.
5876 - Enhanced the CPU operations framework to allow power handlers to be registered
6316 the use of software cache maintenance operations.
6338 - It is now possible to issue cache maintenance operations by set/way for a
6414 - A pointer to the CPU-specific operations.
6473 - Considerable rework to PSCI generic code to support CPU specific operations.
6602 - Optimized the data cache clean/invalidate operations.
6654 values (e.g. during casting operations), which reveals previously hidden bugs
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| /arm-trusted-firmware-2.8.0/docs/threat_model/ |
| A D | threat_model_el3_spm.rst | 559 | Mitigations | Bounding the time for operations to complete can |
562 | | in the SPMC such as counting a number of operations|
638 | | validating the same for all operations. |
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| A D | threat_model_spm.rst | 604 | | Bounding the time for operations to complete can |
607 | | in the SPMC such as counting a number of operations|
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| /arm-trusted-firmware-2.8.0/docs/components/ |
| A D | debugfs-design.rst | 102 might be split into multiple read operations of smaller chunks.
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| A D | xlat-tables-lib-v2-design.rst | 8 required Translation Lookaside Buffer (TLB) maintenance operations.
397 TLB maintenance operations
400 The library takes care of performing TLB maintenance operations when required.
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| A D | secure-partition-manager-mm.rst | 242 - Interfaces that enable access to privileged operations from S-EL0. These
243 operations typically require access to system resources that are either shared
299 For instance, a request to perform privileged operations on behalf of a
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| A D | rmm-el3-comms-spec.rst | 110 operations are performed after the Boot Manifest is populated.
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| /arm-trusted-firmware-2.8.0/docs/design/ |
| A D | auth-framework.rst | 133 For every image in a Chain of Trust, the following high level operations are
147 In Diagram 1, each component is responsible for one or more of these operations.
228 external library to perform the cryptographic operations. A Crypto-Library (CL)
934 The cryptographic module relies on a library to perform the required operations,
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| A D | reset-design.rst | 28 above is still relevant, as all these operations will occur in BL31 in
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| A D | firmware-design.rst | 246 specific reset handler function (see the section: "CPU specific operations
555 buffer, CPU reset and power down operations, PSCI data, platform data and so on.
1345 CPU specific operations framework
1381 The CPU specific operations framework scales to accommodate a large number of
1388 The CPU specific operations framework depends on the ``cpu_ops`` structure which
1398 the platform makefile. The generic CPU specific operations framework code exists
1439 perform platform specific operations during a power down sequence, for example
2233 ``bakery_lock`` section need to be fetched and appropriate cache operations need
2249 - Additional cache maintenance operations, and
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| A D | cpu-specific-build-macros.rst | 5 operations framework to enable errata workarounds and to enable optimizations
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| /arm-trusted-firmware-2.8.0/docs/plat/arm/ |
| A D | arm-build-options.rst | 141 management operations and for SCP RAM Firmware transfer. If this option
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| /arm-trusted-firmware-2.8.0/docs/perf/ |
| A D | psci-performance-juno.rst | 5 operations in the Trusted Firmware-A Power State Coordination Interface (PSCI)
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| /arm-trusted-firmware-2.8.0/docs/process/ |
| A D | coding-guidelines.rst | 462 as cache maintenance operations.
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