Searched refs:r11 (Results 1 – 7 of 7) sorted by relevance
| /arm-trusted-firmware-2.8.0/bl2/aarch32/ |
| A D | bl2_el3_entrypoint.S | 19 mov r11, r2
36 mov r2, r11
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| A D | bl2_entrypoint.S | 34 mov r11, r2
119 mov r2, r11
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| /arm-trusted-firmware-2.8.0/bl2u/aarch32/ |
| A D | bl2u_entrypoint.S | 33 mov r11, r1
110 mov r0, r11
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| /arm-trusted-firmware-2.8.0/include/arch/aarch32/ |
| A D | smccc_macros.S | 70 mrs r11, lr_fiq
81 mrs r11, lr_und
212 msr lr_fiq, r11
223 msr lr_und, r11
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| A D | smccc_helpers.h | 50 u_register_t r11; member
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| /arm-trusted-firmware-2.8.0/bl32/sp_min/aarch32/ |
| A D | entrypoint.S | 74 mov r11, r2
123 mov r11, #0
134 mov r2, r11
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| /arm-trusted-firmware-2.8.0/lib/aarch32/ |
| A D | cache_helpers.S | 96 adr r11, dcsw_loop_table // compute cache op based on the operation type
97 add r6, r11, r0, lsl #3 // cache op is 2x32-bit instructions
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