| /arm-trusted-firmware-2.8.0/drivers/rpi3/sdhost/ |
| A D | rpi3_sdhost.c | 50 uintptr_t reg_base = rpi3_sdhost_params.reg_base; in rpi3_sdhost_waitcommand() local
73 uintptr_t reg_base = rpi3_sdhost_params.reg_base; in send_command_raw() local
137 uintptr_t reg_base = rpi3_sdhost_params.reg_base; in rpi3_drain_fifo() local
178 uintptr_t reg_base = rpi3_sdhost_params.reg_base; in rpi3_sdhost_print_regs() local
215 uintptr_t reg_base = rpi3_sdhost_params.reg_base; in rpi3_sdhost_reset() local
248 uintptr_t reg_base = rpi3_sdhost_params.reg_base; in rpi3_sdhost_initialize() local
260 uintptr_t reg_base = rpi3_sdhost_params.reg_base; in rpi3_sdhost_send_cmd() local
395 uintptr_t reg_base = rpi3_sdhost_params.reg_base; in rpi3_sdhost_set_clock() local
427 uintptr_t reg_base = rpi3_sdhost_params.reg_base; in rpi3_sdhost_set_ios() local
454 uintptr_t reg_base = rpi3_sdhost_params.reg_base; in rpi3_sdhost_prepare() local
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| /arm-trusted-firmware-2.8.0/drivers/imx/usdhc/ |
| A D | imx_usdhc.c | 44 uintptr_t reg_base = imx_usdhc_params.reg_base; in imx_usdhc_set_clk() local
68 uintptr_t reg_base = imx_usdhc_params.reg_base; in imx_usdhc_initialize() local
82 mmio_write_32(reg_base + MMCBOOT, 0); in imx_usdhc_initialize()
83 mmio_write_32(reg_base + MIXCTRL, 0); in imx_usdhc_initialize()
87 mmio_write_32(reg_base + DLLCTRL, 0); in imx_usdhc_initialize()
112 uintptr_t reg_base = imx_usdhc_params.reg_base; in imx_usdhc_send_cmd() local
130 mmio_write_32(reg_base + INTSIGEN, 0); in imx_usdhc_send_cmd()
254 uintptr_t reg_base = imx_usdhc_params.reg_base; in imx_usdhc_set_ios() local
270 uintptr_t reg_base = imx_usdhc_params.reg_base; in imx_usdhc_prepare() local
272 mmio_write_32(reg_base + DSADDR, buf); in imx_usdhc_prepare()
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| A D | imx_usdhc.h | 13 uintptr_t reg_base; member
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| /arm-trusted-firmware-2.8.0/drivers/rpi3/gpio/ |
| A D | rpi3_gpio.c | 15 static uintptr_t reg_base; variable
49 uintptr_t reg_sel = reg_base + RPI3_GPIO_GPFSEL(regN); in rpi3_gpio_get_select()
74 uintptr_t reg_sel = reg_base + RPI3_GPIO_GPFSEL(regN); in rpi3_gpio_set_select()
110 uintptr_t reg_lev = reg_base + RPI3_GPIO_GPLEV(regN); in rpi3_gpio_get_value()
122 uintptr_t reg_set = reg_base + RPI3_GPIO_GPSET(regN); in rpi3_gpio_set_value()
123 uintptr_t reg_clr = reg_base + RPI3_GPIO_GPSET(regN); in rpi3_gpio_set_value()
139 uintptr_t reg_pud = reg_base + RPI3_GPIO_GPPUD; in rpi3_gpio_set_pull()
140 uintptr_t reg_clk = reg_base + RPI3_GPIO_GPPUDCLK(regN); in rpi3_gpio_set_pull()
162 reg_base = RPI3_GPIO_BASE; in rpi3_gpio_init()
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| /arm-trusted-firmware-2.8.0/plat/socionext/uniphier/ |
| A D | uniphier_nand.c | 52 uintptr_t reg_base; member
88 mmio_write_32(nand->reg_base + DENALI_ECC_ENABLE, 0); in uniphier_nand_block_isbad()
90 mmio_write_32(nand->reg_base + DENALI_INTR_STATUS0, -1); in uniphier_nand_block_isbad()
103 status = mmio_read_32(nand->reg_base + DENALI_INTR_STATUS0); in uniphier_nand_block_isbad()
125 mmio_write_32(nand->reg_base + DENALI_ECC_ENABLE, 1); in uniphier_nand_read_pages()
126 mmio_write_32(nand->reg_base + DENALI_DMA_ENABLE, 1); in uniphier_nand_read_pages()
128 mmio_write_32(nand->reg_base + DENALI_INTR_STATUS0, -1); in uniphier_nand_read_pages()
148 status = mmio_read_32(nand->reg_base + DENALI_INTR_STATUS0); in uniphier_nand_read_pages()
151 mmio_write_32(nand->reg_base + DENALI_DMA_ENABLE, 0); in uniphier_nand_read_pages()
241 nand->reg_base = nand->host_base + 0x100000; in uniphier_nand_hw_init()
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| /arm-trusted-firmware-2.8.0/drivers/synopsys/emmc/ |
| A D | dw_mmc.c | 145 mmio_write_32(dw_params.reg_base + DWMMC_CMD, in dw_update_clk()
149 data = mmio_read_32(dw_params.reg_base + DWMMC_CMD); in dw_update_clk()
177 mmio_write_32(dw_params.reg_base + DWMMC_CLKENA, 0); in dw_set_clk()
180 mmio_write_32(dw_params.reg_base + DWMMC_CLKDIV, div); in dw_set_clk()
184 mmio_write_32(dw_params.reg_base + DWMMC_CLKENA, 1); in dw_set_clk()
185 mmio_write_32(dw_params.reg_base + DWMMC_CLKSRC, 0); in dw_set_clk()
194 assert((dw_params.reg_base & MMC_BLOCK_MASK) == 0); in dw_init()
196 base = dw_params.reg_base; in dw_init()
234 base = dw_params.reg_base; in dw_send_cmd()
360 base = dw_params.reg_base; in dw_prepare()
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| /arm-trusted-firmware-2.8.0/drivers/marvell/comphy/ |
| A D | phy-comphy-3700.c | 614 uintptr_t reg_base = 0; in mvebu_a3700_comphy_usb3_power_on() local
632 reg_base = COMPHY_INDIRECT_REG; in mvebu_a3700_comphy_usb3_power_on()
636 reg_base = USB3_GBE1_PHY; in mvebu_a3700_comphy_usb3_power_on()
666 usb3_reg_set(reg_base, COMPHY_LANE_CFG4, in mvebu_a3700_comphy_usb3_power_on()
673 usb3_reg_set(reg_base, COMPHY_TEST_MODE_CTRL, in mvebu_a3700_comphy_usb3_power_on()
680 usb3_reg_set(reg_base, COMPHY_CLK_SRC_LO, 0x0, in mvebu_a3700_comphy_usb3_power_on()
688 usb3_reg_set(reg_base, COMPHY_GEN2_SET2, in mvebu_a3700_comphy_usb3_power_on()
697 usb3_reg_set(reg_base, COMPHY_GEN3_SET2, in mvebu_a3700_comphy_usb3_power_on()
747 usb3_reg_set(reg_base, COMPHY_KVCO_CAL_CTRL, in mvebu_a3700_comphy_usb3_power_on()
773 usb3_reg_set(reg_base, COMPHY_GEN2_SET3, in mvebu_a3700_comphy_usb3_power_on()
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| /arm-trusted-firmware-2.8.0/drivers/ufs/ |
| A D | ufs.c | 63 assert(ufs_params.reg_base != 0); in ufshc_dme_get()
68 base = ufs_params.reg_base; in ufshc_dme_get()
104 assert((ufs_params.reg_base != 0)); in ufshc_dme_set()
106 base = ufs_params.reg_base; in ufshc_dme_set()
464 mmio_write_32(ufs_params.reg_base + IS, ~0); in ufs_send_request()
691 assert((ufs_params.reg_base != 0) && in ufs_read_capacity()
732 assert((ufs_params.reg_base != 0) && in ufs_read_blocks()
754 assert((ufs_params.reg_base != 0) && in ufs_write_blocks()
795 mmio_write_32(ufs_params.reg_base + UTRLBA, in ufs_enum()
847 (params->reg_base != 0) && in ufs_init()
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| /arm-trusted-firmware-2.8.0/drivers/synopsys/ufs/ |
| A D | dw_ufs.c | 23 assert((params != NULL) && (params->reg_base != 0)); in dwufs_phy_init()
25 base = params->reg_base; in dwufs_phy_init()
103 assert((params != NULL) && (params->reg_base != 0)); in dwufs_phy_set_pwr_mode()
105 base = params->reg_base; in dwufs_phy_set_pwr_mode()
196 ufs_params.reg_base = params->reg_base; in dw_ufs_init()
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| /arm-trusted-firmware-2.8.0/drivers/imx/timer/ |
| A D | imx_gpt.h | 12 void imx_gpt_ops_init(uintptr_t reg_base);
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| /arm-trusted-firmware-2.8.0/include/drivers/synopsys/ |
| A D | dw_mmc.h | 13 uintptr_t reg_base; member
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| /arm-trusted-firmware-2.8.0/include/drivers/st/ |
| A D | stm32_sdmmc2.h | 16 uintptr_t reg_base; member
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| /arm-trusted-firmware-2.8.0/plat/intel/soc/common/include/ |
| A D | socfpga_private.h | 20 .reg_base = SOCFPGA_MMC_REG_BASE \
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| /arm-trusted-firmware-2.8.0/include/drivers/ |
| A D | dw_ufs.h | 102 uintptr_t reg_base; member
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| /arm-trusted-firmware-2.8.0/drivers/st/mmc/ |
| A D | stm32_sdmmc2.c | 165 uintptr_t base = sdmmc2_params.reg_base; in stm32_sdmmc2_init()
227 uintptr_t base = sdmmc2_params.reg_base; in stm32_sdmmc2_send_cmd_req()
473 uintptr_t base = sdmmc2_params.reg_base; in stm32_sdmmc2_set_ios()
527 uintptr_t base = sdmmc2_params.reg_base; in stm32_sdmmc2_prepare()
593 uintptr_t base = sdmmc2_params.reg_base; in stm32_sdmmc2_read()
698 sdmmc2_params.reg_base); in stm32_sdmmc2_dt_get_config()
761 ((params->reg_base & MMC_BLOCK_MASK) == 0U) && in stm32_sdmmc2_mmc_init()
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| /arm-trusted-firmware-2.8.0/plat/st/common/ |
| A D | bl2_io_storage.c | 235 params.reg_base = STM32MP_SDMMC1_BASE; in boot_mmc()
238 params.reg_base = STM32MP_SDMMC2_BASE; in boot_mmc()
241 params.reg_base = STM32MP_SDMMC3_BASE; in boot_mmc()
246 params.reg_base = STM32MP_SDMMC1_BASE; in boot_mmc()
248 params.reg_base = STM32MP_SDMMC2_BASE; in boot_mmc()
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| /arm-trusted-firmware-2.8.0/plat/hisilicon/poplar/include/ |
| A D | hi3798cv200.h | 75 .reg_base = REG_BASE_MCI, \
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| /arm-trusted-firmware-2.8.0/plat/imx/imx8m/imx8mm/ |
| A D | imx8mm_bl2_el3_setup.c | 46 params.reg_base = PLAT_IMX8MM_BOOT_MMC_BASE; in imx8mm_usdhc_setup()
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| /arm-trusted-firmware-2.8.0/include/drivers/rpi3/sdhost/ |
| A D | rpi3_sdhost.h | 16 uintptr_t reg_base; member
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| /arm-trusted-firmware-2.8.0/plat/rpi/rpi3/ |
| A D | rpi3_bl2_setup.c | 35 params.reg_base = RPI3_SDHOST_BASE; in rpi3_sdhost_setup()
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| /arm-trusted-firmware-2.8.0/plat/imx/imx7/warp7/ |
| A D | warp7_bl2_el3_setup.c | 106 params.reg_base = PLAT_WARP7_BOOT_MMC_BASE; in warp7_usdhc_setup()
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| /arm-trusted-firmware-2.8.0/plat/hisilicon/hikey/ |
| A D | hikey_bl1_setup.c | 98 params.reg_base = DWMMC0_BASE; in bl1_platform_setup()
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| /arm-trusted-firmware-2.8.0/plat/imx/imx7/picopi/ |
| A D | picopi_bl2_el3_setup.c | 100 params.reg_base = PLAT_PICOPI_BOOT_MMC_BASE; in picopi_usdhc_setup()
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| /arm-trusted-firmware-2.8.0/drivers/st/spi/ |
| A D | stm32_qspi.c | 109 uintptr_t reg_base; member
120 return stm32_qspi.reg_base; in qspi_base()
470 &stm32_qspi.reg_base, &size); in stm32_qspi_init()
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| /arm-trusted-firmware-2.8.0/plat/hisilicon/hikey960/ |
| A D | hikey960_bl1_setup.c | 175 ufs_params.reg_base = UFS_REG_BASE; in hikey960_ufs_init()
|