Searched refs:regval (Results 1 – 10 of 10) sorted by relevance
| /arm-trusted-firmware-2.8.0/drivers/brcm/i2c/ |
| A D | i2c.c | 131 uint32_t regval; in iproc_dump_i2c_regs() local
194 uint32_t regval; in iproc_i2c_startbusy_wait() local
223 uint32_t regval; in iproc_i2c_write_trans_data() local
300 regval); in iproc_i2c_write_trans_data()
312 uint32_t regval; in iproc_i2c_write_master_command() local
381 uint32_t regval; in iproc_i2c_data_recv() local
479 uint32_t regval; in iproc_i2c_init() local
522 regval = 0x0U; in iproc_i2c_init()
576 uint32_t regval; in i2c_probe() local
865 uint32_t regval; in i2c_get_bus_speed() local
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| /arm-trusted-firmware-2.8.0/plat/hisilicon/poplar/ |
| A D | plat_pm.c | 39 unsigned int regval, regval_bak; in poplar_pwr_domain_on() local
47 regval = mmio_read_32((uintptr_t)(REG_BASE_CRG + REG_CPU_RST)); in poplar_pwr_domain_on()
48 regval &= ~(1 << (cpu + CPU_REG_COREPO_SRST)); in poplar_pwr_domain_on()
49 mmio_write_32((uintptr_t)(REG_BASE_CRG + REG_CPU_RST), regval); in poplar_pwr_domain_on()
52 regval = mmio_read_32((uintptr_t)(REG_BASE_CRG + REG_CPU_RST)); in poplar_pwr_domain_on()
53 regval &= ~(1 << (cpu + CPU_REG_CORE_SRST)); in poplar_pwr_domain_on()
54 mmio_write_32((uintptr_t)(REG_BASE_CRG + REG_CPU_RST), regval); in poplar_pwr_domain_on()
57 regval = regval_bak & (~(1 << REG_CPU_LP_CPU_SW_BEGIN)); in poplar_pwr_domain_on()
58 mmio_write_32((uintptr_t)(REG_BASE_CRG + REG_CPU_LP), regval); in poplar_pwr_domain_on()
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| /arm-trusted-firmware-2.8.0/plat/xilinx/zynqmp/pm_service/ |
| A D | pm_api_pinctrl.c | 26 uint8_t regval; member
39 .regval = 0x20,
45 .regval = 0x20,
51 .regval = 0x02,
57 .regval = 0x02,
63 .regval = 0x02,
69 .regval = 0x02,
75 .regval = 0x02,
81 .regval = 0x00,
87 .regval = 0x40,
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| /arm-trusted-firmware-2.8.0/drivers/renesas/common/ddr/ddr_a/ |
| A D | ddr_init_e3.c | 39 uint32_t regval, j; in init_ddr() local
666 regval); in init_ddr()
692 rbd_0c[0] = (regval) & 0x1f; in init_ddr()
704 regval = regval | (rbd_0c[j] << 8 * j); in init_ddr()
709 rbd_0c[0] = (regval) & 0x1f; in init_ddr()
721 regval = regval | (rbd_0c[j] << 8 * j); in init_ddr()
842 uint32_t regval, j; in recovery_from_backup_mode() local
1518 regval); in recovery_from_backup_mode()
1556 regval = regval | (rbd_0c[j] << 8 * j); in recovery_from_backup_mode()
1561 rbd_0c[0] = regval & 0x1f; in recovery_from_backup_mode()
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| /arm-trusted-firmware-2.8.0/plat/nvidia/tegra/common/ |
| A D | tegra_sip_calls.c | 41 uint32_t regval, local_x2_32 = (uint32_t)x2; in tegra_sip_handler() local
84 regval = mmio_read_32(TEGRA_CAR_RESET_BASE + in tegra_sip_handler()
86 if ((regval & GPU_RESET_BIT) == 0U) { in tegra_sip_handler()
97 regval = mmio_read_32(TEGRA_CAR_RESET_BASE + in tegra_sip_handler()
99 if ((regval & GPU_RESET_BIT) == 0U) { in tegra_sip_handler()
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| /arm-trusted-firmware-2.8.0/drivers/renesas/common/ |
| A D | common.c | 13 void __attribute__ ((section(".system_ram"))) cpg_write(uintptr_t regadr, uint32_t regval) in cpg_write() argument
15 void cpg_write(uintptr_t regadr, uint32_t regval) in cpg_write()
18 uint32_t value = regval; in cpg_write()
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| /arm-trusted-firmware-2.8.0/plat/mediatek/drivers/dp/ |
| A D | mt_dp.c | 29 uint32_t regval = 0UL; in dp_secure_handler() local
63 regval = (VIDEO_MUTE_SEL_SECURE_FLDMASK | fldmask); in dp_secure_handler()
65 regval, regmsk); in dp_secure_handler()
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| /arm-trusted-firmware-2.8.0/drivers/brcm/emmc/ |
| A D | emmc_csl_sdcard.c | 971 uint32_t regval, cmd12, time = 0; in wait_for_event() local
982 if (regval & SD4_EMMC_TOP_INTR_DMAIRQ_MASK) { in wait_for_event()
997 ERROR("EMMC: INT[0x%x]\n", regval); in wait_for_event()
1001 if (regval & SD4_EMMC_TOP_INTR_CTOERR_MASK) { in wait_for_event()
1003 handle->device->ctrl.cmdIndex, regval); in wait_for_event()
1009 if (regval & SD_CMD_ERROR_FLAGS) { in wait_for_event()
1026 if (SD_DATA_ERROR_FLAGS & regval) { in wait_for_event()
1030 (SD_DATA_ERROR_FLAGS & regval); in wait_for_event()
1035 if ((regval & mask) == 0) in wait_for_event()
1038 } while ((regval & mask) == 0); in wait_for_event()
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| /arm-trusted-firmware-2.8.0/plat/hisilicon/hikey960/drivers/ipc/ |
| A D | hisi_ipc.c | 97 unsigned int regval; in hisi_ipc_send_cmd_with_ack() local
107 regval = mmio_read_32(IPC_MBX_SOURCE_REG(mbox)); in hisi_ipc_send_cmd_with_ack()
108 if (regval == source) in hisi_ipc_send_cmd_with_ack()
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| /arm-trusted-firmware-2.8.0/plat/renesas/common/include/ |
| A D | rcar_private.h | 101 void cpg_write(uintptr_t regadr, uint32_t regval);
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