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Searched refs:row (Results 1 – 5 of 5) sorted by relevance

/arm-trusted-firmware-2.8.0/drivers/brcm/
A Dsotp.c262 int row; in sotp_read_key() local
269 row = start_row; in sotp_read_key()
270 while ((keysize > 0) && (row <= end_row)) { in sotp_read_key()
271 row_data = sotp_mem_read(row, SOTP_ROW_ECC); in sotp_read_key()
279 row++; in sotp_read_key()
282 if ((status2 == 0xFFFFFFFF) || (status == 0) || (row > end_row)) in sotp_read_key()
/arm-trusted-firmware-2.8.0/drivers/renesas/common/ddr/ddr_b/
A Dboot_init_dram_regdef.h24 #define DBMEMCONF_REG(d3, row, bank, col, dw) \ argument
25 (((d3) << 30) | ((row) << 24) | ((bank) << 16) | ((col) << 8) | (dw))
/arm-trusted-firmware-2.8.0/plat/intel/soc/agilex/soc/
A Dagilex_memory_controller.c175 uint32_t data, dram_addr_order, ddr_conf, bank, row, col, in configure_ddr_sched_ctrl_regs() local
190 row = IOHMC_DRAMADDRW_ROW_ADDR_WIDTH(data); in configure_ddr_sched_ctrl_regs()
194 ddr_conf = match_ddr_conf(DDR_CONFIG(dram_addr_order, bank, col, row)); in configure_ddr_sched_ctrl_regs()
/arm-trusted-firmware-2.8.0/plat/intel/soc/stratix10/soc/
A Ds10_memory_controller.c204 uint32_t data, dram_addr_order, ddr_conf, bank, row, col, in configure_ddr_sched_ctrl_regs() local
219 row = IOHMC_DRAMADDRW_ROW_ADDR_WIDTH(data); in configure_ddr_sched_ctrl_regs()
223 ddr_conf = match_ddr_conf(DDR_CONFIG(dram_addr_order, bank, col, row)); in configure_ddr_sched_ctrl_regs()
/arm-trusted-firmware-2.8.0/plat/rockchip/rk3399/drivers/dram/
A Ddfs.c89 uint32_t row; in get_cs_die_capability() local
91 row = cs == 0 ? ch->cs0_row : ch->cs1_row; in get_cs_die_capability()
95 cs_cap = (1 << (row + ((1 << ch->bk) / 4 + 1) + ch->col + in get_cs_die_capability()

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