Searched refs:CCCR (Results 1 – 5 of 5) sorted by relevance
101 unsigned long cccr = readl(clk_regs + CCCR); in clk_pxa25x_memory_get_rate()205 unsigned long cccr = readl(clk_regs + CCCR); in clk_pxa25x_run_get_rate()216 unsigned long clkcfg, cccr = readl(clk_regs + CCCR); in clk_pxa25x_cpll_get_rate()248 pxa2xx_cpll_change(&pxa25x_freqs[i], mdrefr_dri, clk_regs + CCCR); in clk_pxa25x_cpll_set_rate()
240 pxa2xx_cpll_change(&pxa27x_freqs[i], mdrefr_dri, clk_regs + CCCR); in clk_pxa27x_cpll_set_rate()252 unsigned long cccr = readl(clk_regs + CCCR); in clk_pxa27x_lcd_base_get_rate()395 unsigned long cccr = readl(clk_regs + CCCR); in clk_pxa27x_memory_get_rate()414 unsigned long cccr = readl(clk_regs + CCCR); in clk_pxa27x_memory_get_parent()
5 #define CCCR (0x0000) /* Core Clock Configuration Register */ macro
70 ldr r6, =CCCR73 ldr r7, =CCCR_SLEEP @ prepare CCCR sleep value113 ldr r6, =CCCR
134 #define CCCR io_p2v(0x41300000) /* Core Clock Configuration Register */ macro
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