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Searched refs:CLK_APMIXED_MSDCPLL2 (Results 1 – 4 of 4) sorted by relevance

/linux-6.3-rc2/drivers/clk/mediatek/
A Dclk-mt8173-apmixedsys.c77 PLL(CLK_APMIXED_MSDCPLL2, "msdcpll2", 0x2f0, 0x2fc, 0, 0, 21, 0x2f0, 4, 0x0, 0x2f4, 0),
A Dclk-mt2712.c1244 PLL(CLK_APMIXED_MSDCPLL2, "msdcpll2", 0x0410, 0x041C, 0x00000100,
/linux-6.3-rc2/include/dt-bindings/clock/
A Dmt8173-clk.h169 #define CLK_APMIXED_MSDCPLL2 14 macro
A Dmt2712-clk.h21 #define CLK_APMIXED_MSDCPLL2 9 macro

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