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Searched refs:CLK_SDMMC1 (Results 1 – 12 of 12) sorted by relevance

/linux-6.3-rc2/include/dt-bindings/clock/
A Dexynos5250.h85 #define CLK_SDMMC1 281 macro
A Dexynos4.h136 #define CLK_SDMMC1 298 macro
A Dexynos3250.h204 #define CLK_SDMMC1 198 macro
A Drk3568-cru.h242 #define CLK_SDMMC1 179 macro
/linux-6.3-rc2/drivers/clk/samsung/
A Dclk-exynos5250.c562 GATE(CLK_SDMMC1, "sdmmc1", "div_aclk200", GATE_IP_FSYS, 13, 0, 0),
A Dclk-exynos3250.c644 GATE(CLK_SDMMC1, "sdmmc1", "div_aclk_200", GATE_IP_FSYS, 6, 0, 0),
A Dclk-exynos4.c841 GATE(CLK_SDMMC1, "sdmmc1", "aclk133", GATE_IP_FSYS, 6,
/linux-6.3-rc2/arch/arm/boot/dts/
A Dexynos3250.dtsi571 clocks = <&cmu CLK_SDMMC1>, <&cmu CLK_SCLK_MMC1>;
A Dexynos4.dtsi332 clocks = <&clock CLK_SDMMC1>, <&clock CLK_SCLK_MMC1>;
A Dexynos5250.dtsi558 clocks = <&clock CLK_SDMMC1>, <&clock CLK_SCLK_MMC1>;
/linux-6.3-rc2/drivers/clk/rockchip/
A Dclk-rk3568.c896 COMPOSITE_NODIV(CLK_SDMMC1, "clk_sdmmc1", clk_sdmmc_p, 0,
/linux-6.3-rc2/arch/arm64/boot/dts/rockchip/
A Drk356x.dtsi1020 clocks = <&cru HCLK_SDMMC1>, <&cru CLK_SDMMC1>,

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