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Searched refs:CLK_TOP_NFIECC_SEL (Results 1 – 7 of 7) sorted by relevance

/linux-6.3-rc2/include/dt-bindings/clock/
A Dmt8516-clk.h195 #define CLK_TOP_NFIECC_SEL 163 macro
A Dmediatek,mt8365-clk.h107 #define CLK_TOP_NFIECC_SEL 97 macro
A Dmt2712-clk.h161 #define CLK_TOP_NFIECC_SEL 130 macro
/linux-6.3-rc2/drivers/clk/mediatek/
A Dclk-mt8516.c434 MUX(CLK_TOP_NFIECC_SEL, "nfiecc_sel", nfiecc_parents,
A Dclk-mt8167.c624 MUX(CLK_TOP_NFIECC_SEL, "nfiecc_sel", nfiecc_parents,
A Dclk-mt2712.c809 MUX_GATE(CLK_TOP_NFIECC_SEL, "nfiecc_sel",
A Dclk-mt8365.c518 MUX_GATE_CLR_SET_UPD(CLK_TOP_NFIECC_SEL, "nfiecc_sel", nfiecc_parents,

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