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Searched refs:CLK_TOP_PE2_MAC_P1_SEL (Results 1 – 4 of 4) sorted by relevance

/linux-6.3-rc2/include/dt-bindings/clock/
A Dmt2712-clk.h163 #define CLK_TOP_PE2_MAC_P1_SEL 132 macro
/linux-6.3-rc2/Documentation/devicetree/bindings/pci/
A Dmediatek-pcie.txt160 clocks = <&topckgen CLK_TOP_PE2_MAC_P1_SEL>,
/linux-6.3-rc2/drivers/clk/mediatek/
A Dclk-mt2712.c813 MUX_GATE(CLK_TOP_PE2_MAC_P1_SEL, "pe2_mac_p1_sel",
/linux-6.3-rc2/arch/arm64/boot/dts/mediatek/
A Dmt2712e.dtsi933 clocks = <&topckgen CLK_TOP_PE2_MAC_P1_SEL>,

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