Searched refs:CLK_WDT (Results 1 – 18 of 18) sorted by relevance
| /linux-6.3-rc2/include/dt-bindings/clock/ |
| A D | exynos5410.h | 51 #define CLK_WDT 316 macro
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| A D | exynos5250.h | 140 #define CLK_WDT 336 macro
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| A D | s5pv210.h | 156 #define CLK_WDT 138 macro
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| A D | exynos4.h | 183 #define CLK_WDT 345 macro
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| A D | exynos5420.h | 109 #define CLK_WDT 316 macro
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| A D | exynos3250.h | 152 #define CLK_WDT 146 macro
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| /linux-6.3-rc2/drivers/clk/samsung/ |
| A D | clk-exynos5410.c | 168 GATE(CLK_WDT, "wdt", "aclk66", GATE_IP_PERIS, 19, 0, 0),
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| A D | clk-exynos4.c | 947 GATE(CLK_WDT, "watchdog", "aclk100", E4210_GATE_IP_PERIR, 14,
998 GATE(CLK_WDT, "watchdog", "aclk100", E4X12_GATE_IP_PERIR, 14, 0, 0),
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| A D | clk-s5pv210.c | 572 GATE(CLK_WDT, "watchdog", "dout_pclkp", CLK_GATE_IP3, 22, 0, 0),
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| A D | clk-exynos5250.c | 626 GATE(CLK_WDT, "wdt", "div_aclk66", GATE_IP_PERIS, 19, 0, 0),
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| A D | clk-exynos3250.c | 477 GATE(CLK_WDT, "wdt", "div_aclk_100", GATE_IP_PERIR, 14, 0, 0),
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| A D | clk-exynos5420.c | 1124 GATE(CLK_WDT, "wdt", "aclk66_psgen", GATE_IP_PERIS, 19, 0, 0),
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| /linux-6.3-rc2/arch/arm/boot/dts/ |
| A D | exynos5410.dtsi | 434 clocks = <&clock CLK_WDT>;
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| A D | exynos4210.dtsi | 300 clocks = <&clock CLK_WDT>;
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| A D | s5pv210.dtsi | 299 clocks = <&clocks CLK_WDT>;
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| A D | exynos4412.dtsi | 456 clocks = <&clock CLK_WDT>;
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| A D | exynos5250.dtsi | 307 clocks = <&clock CLK_WDT>;
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| A D | exynos5420.dtsi | 1396 clocks = <&clock CLK_WDT>;
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Completed in 28 milliseconds