| /linux-6.3-rc2/drivers/gpu/drm/i915/display/ |
| A D | g4x_dp.c | 52 return IS_CHERRYVIEW(i915) ? &chv_dpll[0] : &vlv_dpll[0]; in vlv_get_dpll()
68 } else if (IS_CHERRYVIEW(dev_priv)) { in g4x_dp_set_clock()
162 if (IS_CHERRYVIEW(dev_priv)) in intel_dp_prepare()
291 else if (IS_CHERRYVIEW(dev_priv)) in g4x_dp_port_enabled()
467 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_dp_link_down()
652 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_enable_dp()
662 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_enable_dp()
665 if (IS_CHERRYVIEW(dev_priv)) in intel_enable_dp()
1314 if (IS_CHERRYVIEW(dev_priv)) { in g4x_dp_init()
1340 if (IS_CHERRYVIEW(dev_priv)) in g4x_dp_init()
[all …]
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| A D | intel_pps.c | 28 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) { in pps_name()
115 if (IS_CHERRYVIEW(dev_priv)) in vlv_power_sequencer_kick()
127 release_cl_override = IS_CHERRYVIEW(dev_priv) && in vlv_power_sequencer_kick()
346 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in intel_num_pps()
395 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) { in pps_initial_setup()
485 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_pps_get_registers()
531 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in edp_have_panel_power()
1510 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in pps_init_registers()
1571 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in intel_pps_encoder_reset()
1610 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in pps_init_late()
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| A D | intel_pipe_crc.c | 148 if (!IS_CHERRYVIEW(dev_priv)) in vlv_pipe_crc_ctl_reg()
408 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in get_new_crc_ctl_reg()
538 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_is_valid_crc_source()
614 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_crtc_set_crc_source()
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| A D | i9xx_plane.c | 140 if (IS_CHERRYVIEW(dev_priv)) in i9xx_plane_has_windowing()
464 if (IS_CHERRYVIEW(dev_priv) && i9xx_plane == PLANE_B) { in i9xx_plane_update_arm()
805 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_primary_plane_create()
839 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_primary_plane_create()
870 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_primary_plane_create()
912 if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B) { in intel_primary_plane_create()
1016 if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B && in i9xx_get_initial_plane_config()
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| A D | intel_lpe_audio.c | 122 pdata->num_ports = IS_CHERRYVIEW(dev_priv) ? 3 : 2; /* B,C,D or B,C */ in lpe_audio_platdev_create()
187 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in lpe_audio_detect()
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| A D | intel_vga.c | 20 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in intel_vga_cntrl_reg()
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| A D | g4x_hdmi.c | 53 else if (IS_CHERRYVIEW(dev_priv)) in intel_hdmi_prepare()
583 if (IS_CHERRYVIEW(dev_priv)) { in g4x_hdmi_init()
608 if (IS_CHERRYVIEW(dev_priv)) { in g4x_hdmi_init()
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| A D | intel_sprite.c | 463 if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B) in vlv_sprite_update_arm()
1407 if (IS_CHERRYVIEW(dev_priv) && in chv_plane_check_rotation()
1503 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in intel_sprite_set_colorkey_ioctl()
1742 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { in intel_sprite_plane_create()
1751 if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B) { in intel_sprite_plane_create()
1801 if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B) { in intel_sprite_plane_create()
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| A D | intel_cdclk.c | 547 if (IS_CHERRYVIEW(dev_priv)) in vlv_program_pfi_credits()
554 if (IS_CHERRYVIEW(dev_priv)) in vlv_program_pfi_credits()
2347 else if (IS_CHERRYVIEW(dev_priv)) in intel_pixel_rate_to_cdclk()
2415 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in intel_crtc_compute_min_cdclk()
2951 else if (IS_CHERRYVIEW(dev_priv)) in intel_compute_max_dotclk()
3020 } else if (IS_CHERRYVIEW(dev_priv)) { in intel_update_max_cdclk()
3054 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_update_cdclk()
3192 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_read_rawclk()
3382 } else if (IS_CHERRYVIEW(dev_priv)) { in intel_init_cdclk_hooks()
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| A D | vlv_dsi_pll.c | 75 if (IS_CHERRYVIEW(dev_priv)) { in dsi_calc_mnp()
125 int refclk = IS_CHERRYVIEW(dev_priv) ? 100000 : 25000; in vlv_dsi_pclk()
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| A D | intel_dsi_vbt.c | 496 else if (IS_CHERRYVIEW(dev_priv)) in mipi_exec_gpio()
979 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in intel_dsi_vbt_gpio_init()
1040 if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in intel_dsi_vbt_gpio_cleanup()
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| A D | intel_crtc.c | 340 if (IS_CHERRYVIEW(dev_priv) || in intel_crtc_init()
484 bool need_vlv_dsi_wa = (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in intel_pipe_update_start()
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| A D | intel_display.c | 2236 if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B) { in valleyview_crtc_enable()
2247 if (IS_CHERRYVIEW(dev_priv)) in valleyview_crtc_enable()
2356 if (IS_CHERRYVIEW(dev_priv)) in i9xx_crtc_disable()
3000 IS_CHERRYVIEW(dev_priv)) { in i9xx_set_pipeconf()
3206 IS_CHERRYVIEW(dev_priv)) { in i9xx_get_pipe_config()
3231 if (IS_CHERRYVIEW(dev_priv)) in i9xx_get_pipe_config()
3282 if (IS_CHERRYVIEW(dev_priv)) in i9xx_get_pipe_config()
4923 IS_CHERRYVIEW(dev_priv))) in compute_baseline_pipe_bpp()
5771 if (IS_CHERRYVIEW(dev_priv)) in intel_pipe_config_compare()
8029 if (IS_CHERRYVIEW(dev_priv)) { in intel_setup_outputs()
[all …]
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| A D | intel_drrs.c | 73 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_drrs_set_refresh_rate_pipeconf()
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| /linux-6.3-rc2/drivers/gpu/drm/i915/selftests/ |
| A D | intel_uncore.c | 175 if (IS_VALLEYVIEW(gt->i915) || IS_CHERRYVIEW(gt->i915)) { in live_forcewake_ops()
287 !IS_CHERRYVIEW(gt->i915)) in live_forcewake_domains()
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| /linux-6.3-rc2/drivers/gpu/drm/i915/gt/ |
| A D | intel_gtt.c | 32 return IS_CHERRYVIEW(i915) || intel_ggtt_update_needs_vtd_wa(i915); in intel_vm_no_concurrent_access_wa()
418 else if (IS_CHERRYVIEW(i915)) in gtt_write_workarounds()
612 else if (IS_CHERRYVIEW(i915) || IS_GEN9_LP(i915)) in setup_private_pat()
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| A D | intel_rc6.c | 584 if (IS_CHERRYVIEW(i915)) in intel_rc6_init()
622 if (IS_CHERRYVIEW(i915)) in intel_rc6_enable()
777 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) { in intel_rc6_residency_ns()
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| A D | intel_rps.c | 838 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in rps_set()
1539 else if (IS_CHERRYVIEW(i915)) in intel_rps_enable()
1637 else if (IS_CHERRYVIEW(i915)) in intel_gpu_freq()
1654 else if (IS_CHERRYVIEW(i915)) in intel_freq_opcode()
1870 adj = IS_CHERRYVIEW(gt->i915) ? 2 : 1; in rps_work()
1886 adj = IS_CHERRYVIEW(gt->i915) ? -2 : -1; in rps_work()
2014 if (IS_CHERRYVIEW(i915)) in intel_rps_init()
2107 else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in intel_rps_get_cagf()
2135 } else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) { in read_cagf()
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| A D | selftest_rc6.c | 51 if (IS_VALLEYVIEW(gt->i915) || IS_CHERRYVIEW(gt->i915)) in live_rc6_manual()
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| A D | intel_gt_pm_debugfs.c | 324 else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in drpc_show()
355 } else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) { in intel_gt_pm_frequency_dump()
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| A D | intel_gt_sysfs_pm.c | 320 if (IS_VALLEYVIEW(gt->i915) || IS_CHERRYVIEW(gt->i915)) { in intel_sysfs_rc6_init()
723 if (IS_VALLEYVIEW(gt->i915) || IS_CHERRYVIEW(gt->i915)) in intel_sysfs_rps_init()
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| /linux-6.3-rc2/drivers/gpu/drm/i915/soc/ |
| A D | intel_gmch.c | 87 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in intel_gmch_bar_setup()
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| /linux-6.3-rc2/drivers/gpu/drm/i915/ |
| A D | vlv_suspend.c | 386 if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv)) in vlv_suspend_complete()
431 if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv)) in vlv_resume_prepare()
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| A D | vlv_sideband.c | 224 if (IS_CHERRYVIEW(i915)) in vlv_dpio_phy_iosf_port()
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| A D | i915_irq.c | 191 IS_CHERRYVIEW(dev_priv)) in intel_hpd_init_pins()
1180 IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in i9xx_hpd_irq_ack()
1219 IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in i9xx_hpd_irq_handler()
1234 IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && in i9xx_hpd_irq_handler()
2589 if (IS_CHERRYVIEW(dev_priv)) in vlv_display_irq_reset()
2623 if (IS_CHERRYVIEW(dev_priv)) in vlv_display_irq_postinstall()
3948 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) in intel_irq_init()
3989 if (IS_CHERRYVIEW(dev_priv)) in intel_irq_handler()
4014 if (IS_CHERRYVIEW(dev_priv)) in intel_irq_reset()
4039 if (IS_CHERRYVIEW(dev_priv)) in intel_irq_postinstall()
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