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Searched refs:LCCR0 (Results 1 – 5 of 5) sorted by relevance

/linux-6.3-rc2/drivers/video/fbdev/
A Dsa1100fb.c703 if (readl_relaxed(fbi->base + LCCR0) != fbi->reg_lccr0 || in sa1100fb_activate_var()
796 writel_relaxed(fbi->reg_lccr0 & ~LCCR0_LEN, fbi->base + LCCR0); in sa1100fb_enable_controller()
799 writel_relaxed(fbi->reg_lccr0 | LCCR0_LEN, fbi->base + LCCR0); in sa1100fb_enable_controller()
806 dev_dbg(fbi->dev, "LCCR0: 0x%08x\n", readl_relaxed(fbi->base + LCCR0)); in sa1100fb_enable_controller()
828 lccr0 = readl_relaxed(fbi->base + LCCR0); in sa1100fb_disable_controller()
830 writel_relaxed(lccr0, fbi->base + LCCR0); in sa1100fb_disable_controller()
832 writel_relaxed(lccr0, fbi->base + LCCR0); in sa1100fb_disable_controller()
850 u32 lccr0 = readl_relaxed(fbi->base + LCCR0) | LCCR0_LDM; in sa1100fb_handle_irq()
851 writel_relaxed(lccr0, fbi->base + LCCR0); in sa1100fb_handle_irq()
A Dsa1100fb.h15 #define LCCR0 0x0000 /* LCD Control Reg. 0 */ macro
A Dpxafb.c1156 lcd_writel(fbi, LCCR0, fbi->reg_lccr0 & ~LCCR0_ENB); in pxafb_smart_flush()
1188 lcd_writel(fbi, LCCR0, fbi->reg_lccr0 | LCCR0_ENB); in pxafb_smart_flush()
1198 lcd_writel(fbi, LCCR0, fbi->reg_lccr0 & ~LCCR0_ENB); in pxafb_smart_flush()
1394 if ((lcd_readl(fbi, LCCR0) != fbi->reg_lccr0) || in pxafb_activate_var()
1468 lcd_writel(fbi, LCCR0, fbi->reg_lccr0 & ~LCCR0_ENB); in pxafb_enable_controller()
1473 lcd_writel(fbi, LCCR0, fbi->reg_lccr0 | LCCR0_ENB); in pxafb_enable_controller()
1491 lccr0 = lcd_readl(fbi, LCCR0) & ~LCCR0_LDM; in pxafb_disable_controller()
1492 lcd_writel(fbi, LCCR0, lccr0); in pxafb_disable_controller()
1493 lcd_writel(fbi, LCCR0, lccr0 | LCCR0_DIS); in pxafb_disable_controller()
1511 lccr0 = lcd_readl(fbi, LCCR0); in pxafb_handle_irq()
[all …]
A Dpxa3xx-regs.h8 #define LCCR0 (0x000) /* LCD Controller Control Register 0 */ macro
/linux-6.3-rc2/Documentation/fb/
A Dsa1100fb.rst22 displays are supported as long as the SDS bit is set in LCCR0; GPIO<9:2>

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