Searched refs:MCFICM_INTC0 (Results 1 – 6 of 6) sorted by relevance
57 imraddr = (irq & 0x40) ? MCFICM_INTC1 : MCFICM_INTC0; in intc_irq_mask()59 imraddr = MCFICM_INTC0; in intc_irq_mask()75 imraddr = (irq & 0x40) ? MCFICM_INTC1 : MCFICM_INTC0; in intc_irq_unmask()77 imraddr = MCFICM_INTC0; in intc_irq_unmask()118 icraddr = (irq & 0x40) ? MCFICM_INTC1 : MCFICM_INTC0; in intc_irq_startup()120 icraddr = MCFICM_INTC0; in intc_irq_startup()198 __raw_writel(0x1, MCFICM_INTC0 + MCFINTC_IMRL); in init_IRQ()
24 #define MCFICM_INTC0 0xFC048000 /* Base for Interrupt Ctrl 0 */ macro40 #define MCFINTC0_SIMR (MCFICM_INTC0 + MCFINTC_SIMR)41 #define MCFINTC0_CIMR (MCFICM_INTC0 + MCFINTC_CIMR)42 #define MCFINTC0_ICR0 (MCFICM_INTC0 + MCFINTC_ICR0)
24 #define MCFICM_INTC0 (MCF_MBAR + 0x700) /* Base for Interrupt Ctrl 0 */ macro
24 #define MCFICM_INTC0 (MCF_IPSBAR + 0x0c00) /* Base for Interrupt Ctrl 0 */ macro
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