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Searched refs:PCIE0_BASE__INST0_SEG1 (Results 1 – 8 of 8) sorted by relevance

/linux-6.3-rc2/drivers/gpu/drm/amd/include/
A Dnavi12_ip_offset.h826 #define PCIE0_BASE__INST0_SEG1 0x04440000 macro
A Dnavi14_ip_offset.h826 #define PCIE0_BASE__INST0_SEG1 0x00000014 macro
A Dsienna_cichlid_ip_offset.h833 #define PCIE0_BASE__INST0_SEG1 0x00000014 macro
A Dbeige_goby_ip_offset.h981 #define PCIE0_BASE__INST0_SEG1 0x00000014 macro
A Drenoir_ip_offset.h1076 #define PCIE0_BASE__INST0_SEG1 0x04440000 macro
A Dvangogh_ip_offset.h1181 #define PCIE0_BASE__INST0_SEG1 0x00000014 macro
A Darct_ip_offset.h863 #define PCIE0_BASE__INST0_SEG1 0x00411800 macro
A Daldebaran_ip_offset.h1151 #define PCIE0_BASE__INST0_SEG1 0x04440000 macro

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