/linux-6.3-rc2/include/dt-bindings/clock/ |
A D | samsung,s3c64xx-clock.h | 82 #define PCLK_PWM 67 macro
|
A D | rk3036-cru.h | 71 #define PCLK_PWM 350 macro
|
A D | exynos7-clk.h | 87 #define PCLK_PWM 10 macro
|
A D | rk3128-cru.h | 112 #define PCLK_PWM 350 macro
|
A D | rk3228-cru.h | 111 #define PCLK_PWM 350 macro
|
A D | rv1108-cru.h | 120 #define PCLK_PWM 269 macro
|
A D | rk3288-cru.h | 142 #define PCLK_PWM 350 macro
|
A D | rk3328-cru.h | 145 #define PCLK_PWM 214 macro
|
/linux-6.3-rc2/arch/arm/boot/dts/ |
A D | rk3036.dtsi | 427 clocks = <&cru PCLK_PWM>; 437 clocks = <&cru PCLK_PWM>; 447 clocks = <&cru PCLK_PWM>; 457 clocks = <&cru PCLK_PWM>;
|
A D | rk3128.dtsi | 291 clocks = <&cru PCLK_PWM>; 301 clocks = <&cru PCLK_PWM>; 311 clocks = <&cru PCLK_PWM>; 321 clocks = <&cru PCLK_PWM>;
|
A D | rv1108.dtsi | 200 clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>; 212 clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>; 224 clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>; 236 clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
|
A D | s3c64xx.dtsi | 170 clocks = <&clocks PCLK_PWM>;
|
A D | rk322x.dtsi | 440 clocks = <&cru PCLK_PWM>; 450 clocks = <&cru PCLK_PWM>; 460 clocks = <&cru PCLK_PWM>; 470 clocks = <&cru PCLK_PWM>;
|
/linux-6.3-rc2/drivers/clk/samsung/ |
A D | clk-s3c64xx.c | 238 GATE_BUS(PCLK_PWM, "pclk_pwm", "pclk", PCLK_GATE, 7), 343 ALIAS(PCLK_PWM, NULL, "timers"),
|
A D | clk-exynos7.c | 670 GATE(PCLK_PWM, "pclk_pwm", "mout_aclk_peric0_66_user",
|
/linux-6.3-rc2/drivers/clk/rockchip/ |
A D | clk-rk3036.c | 414 GATE(PCLK_PWM, "pclk_pwm", "pclk_peri", 0, RK2928_CLKGATE_CON(7), 10, GFLAGS),
|
A D | clk-rk3128.c | 511 GATE(PCLK_PWM, "pclk_pwm", "pclk_peri", 0, RK2928_CLKGATE_CON(7), 10, GFLAGS),
|
A D | clk-rk3228.c | 608 GATE(PCLK_PWM, "pclk_rk_pwm", "pclk_cpu", 0, RK2928_CLKGATE_CON(9), 7, GFLAGS),
|
A D | clk-rk3328.c | 778 GATE(PCLK_PWM, "pclk_rk_pwm", "pclk_bus", 0, RK3328_CLKGATE_CON(16), 6, GFLAGS),
|
A D | clk-rv1108.c | 630 GATE(PCLK_PWM, "pclk_pwm", "pclk_bus_pre", 0,
|
A D | clk-rk3288.c | 683 GATE(PCLK_PWM, "pclk_pwm", "pclk_cpu", 0, RK3288_CLKGATE_CON(10), 0, GFLAGS),
|
/linux-6.3-rc2/arch/arm64/boot/dts/rockchip/ |
A D | rk3328.dtsi | 455 clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>; 466 clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>; 477 clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>; 489 clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
|
/linux-6.3-rc2/arch/arm64/boot/dts/exynos/ |
A D | exynos7.dtsi | 632 clocks = <&clock_peric0 PCLK_PWM>;
|