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Searched refs:PHYDSYMCLK_CLOCK_CNTL (Results 1 – 6 of 6) sorted by relevance

/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn32/
A Ddcn32_dccg.h45 SR(PHYDSYMCLK_CLOCK_CNTL),\
89 DCCG_SF(PHYDSYMCLK_CLOCK_CNTL, PHYDSYMCLK_FORCE_EN, mask_sh),\
90 DCCG_SF(PHYDSYMCLK_CLOCK_CNTL, PHYDSYMCLK_FORCE_SRC_SEL, mask_sh),\
A Ddcn32_resource.h1269 SR(PHYCSYMCLK_CLOCK_CNTL), SR(PHYDSYMCLK_CLOCK_CNTL), \
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn314/
A Ddcn314_dccg.h46 SR(PHYDSYMCLK_CLOCK_CNTL),\
173 DCCG_SF(PHYDSYMCLK_CLOCK_CNTL, PHYDSYMCLK_FORCE_EN, mask_sh),\
174 DCCG_SF(PHYDSYMCLK_CLOCK_CNTL, PHYDSYMCLK_FORCE_SRC_SEL, mask_sh),\
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn31/
A Ddcn31_dccg.h40 SR(PHYDSYMCLK_CLOCK_CNTL),\
87 DCCG_SF(PHYDSYMCLK_CLOCK_CNTL, PHYDSYMCLK_FORCE_EN, mask_sh),\
88 DCCG_SF(PHYDSYMCLK_CLOCK_CNTL, PHYDSYMCLK_FORCE_SRC_SEL, mask_sh),\
A Ddcn31_dccg.c476 REG_UPDATE_2(PHYDSYMCLK_CLOCK_CNTL, in dccg31_set_physymclk()
483 REG_UPDATE_2(PHYDSYMCLK_CLOCK_CNTL, in dccg31_set_physymclk()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn20/
A Ddcn20_dccg.h259 uint32_t PHYDSYMCLK_CLOCK_CNTL; member

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