Searched refs:PHY_CONTROL (Results 1 – 8 of 8) sorted by relevance
| /linux-6.3-rc2/drivers/net/ethernet/oki-semi/pch_gbe/ |
| A D | pch_gbe_phy.c | 16 #define PHY_CONTROL 0x00 /* Control Register */ macro
180 pch_gbe_phy_read_reg_miic(hw, PHY_CONTROL, &phy_ctrl); in pch_gbe_phy_sw_reset()
182 pch_gbe_phy_write_reg_miic(hw, PHY_CONTROL, phy_ctrl); in pch_gbe_phy_sw_reset()
192 pch_gbe_phy_write_reg_miic(hw, PHY_CONTROL, PHY_CONTROL_DEFAULT); in pch_gbe_phy_hw_reset()
214 pch_gbe_phy_read_reg_miic(hw, PHY_CONTROL, &mii_reg); in pch_gbe_phy_power_up()
216 pch_gbe_phy_write_reg_miic(hw, PHY_CONTROL, mii_reg); in pch_gbe_phy_power_up()
233 pch_gbe_phy_read_reg_miic(hw, PHY_CONTROL, &mii_reg); in pch_gbe_phy_power_down()
235 pch_gbe_phy_write_reg_miic(hw, PHY_CONTROL, mii_reg); in pch_gbe_phy_power_down()
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| /linux-6.3-rc2/drivers/net/ethernet/intel/igc/ |
| A D | igc_phy.c | 113 hw->phy.ops.read_reg(hw, PHY_CONTROL, &mii_reg); in igc_power_up_phy_copper()
115 hw->phy.ops.write_reg(hw, PHY_CONTROL, mii_reg); in igc_power_up_phy_copper()
130 hw->phy.ops.read_reg(hw, PHY_CONTROL, &mii_reg); in igc_power_down_phy_copper()
460 ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_ctrl); in igc_copper_link_autoneg()
465 ret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_ctrl); in igc_copper_link_autoneg()
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| A D | igc_defines.h | 609 #define PHY_CONTROL 0x00 /* Control Register */ macro
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| /linux-6.3-rc2/drivers/net/ethernet/intel/igb/ |
| A D | e1000_phy.c | 889 ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_ctrl); in igb_copper_link_autoneg()
894 ret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_ctrl); in igb_copper_link_autoneg()
1139 ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_data); in igb_phy_force_speed_duplex_igp()
1145 ret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_data); in igb_phy_force_speed_duplex_igp()
1223 ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_data); in igb_phy_force_speed_duplex_m88()
1229 ret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_data); in igb_phy_force_speed_duplex_m88()
2389 hw->phy.ops.read_reg(hw, PHY_CONTROL, &mii_reg); in igb_power_up_phy_copper()
2391 hw->phy.ops.write_reg(hw, PHY_CONTROL, mii_reg); in igb_power_up_phy_copper()
2406 hw->phy.ops.read_reg(hw, PHY_CONTROL, &mii_reg); in igb_power_down_phy_copper()
2408 hw->phy.ops.write_reg(hw, PHY_CONTROL, mii_reg); in igb_power_down_phy_copper()
[all …]
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| A D | igb_ethtool.c | 1630 igb_write_phy_reg(hw, PHY_CONTROL, 0x9140); in igb_integrated_phy_loopback()
1632 igb_write_phy_reg(hw, PHY_CONTROL, 0x8140); in igb_integrated_phy_loopback()
1636 igb_write_phy_reg(hw, PHY_CONTROL, 0x4140); in igb_integrated_phy_loopback()
1647 igb_write_phy_reg(hw, PHY_CONTROL, 0x4140); in igb_integrated_phy_loopback()
1777 igb_read_phy_reg(hw, PHY_CONTROL, &phy_reg); in igb_loopback_cleanup()
1780 igb_write_phy_reg(hw, PHY_CONTROL, phy_reg); in igb_loopback_cleanup()
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| A D | e1000_defines.h | 694 #define PHY_CONTROL 0x00 /* Control Register */ macro
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| /linux-6.3-rc2/drivers/net/ethernet/apm/xgene/ |
| A D | xgene_enet_sgmac.h | 14 #define PHY_CONTROL(src) ((src) & GENMASK(15, 0)) macro
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| A D | xgene_enet_sgmac.c | 122 wr_data = PHY_CONTROL(data); in xgene_mii_phy_write()
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