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Searched refs:PLL_NPLL (Results 1 – 21 of 21) sorted by relevance

/linux-6.3-rc2/include/dt-bindings/clock/
A Dpx30-cru.h10 #define PLL_NPLL 4 macro
A Drk3288-cru.h15 #define PLL_NPLL 5 macro
A Drk3328-cru.h15 #define PLL_NPLL 5 macro
A Drk3368-cru.h15 #define PLL_NPLL 6 macro
A Drk3399-cru.h16 #define PLL_NPLL 6 macro
A Drockchip,rk3588-cru.h22 #define PLL_NPLL 7 macro
A Drk3568-cru.h75 #define PLL_NPLL 6 macro
/linux-6.3-rc2/arch/arm64/boot/dts/rockchip/
A Drk3326-odroid-go.dtsi207 assigned-clocks = <&cru PLL_NPLL>,
A Drk3399-gru-scarlet.dtsi370 <&cru PLL_NPLL>,
A Drk3399-gru.dtsi354 <&cru PLL_NPLL>,
A Drk3588s.dtsi408 <&cru PLL_NPLL>, <&cru PLL_GPLL>,
A Dpx30.dtsi833 assigned-clocks = <&cru PLL_NPLL>,
A Drk3399.dtsi1477 <&cru PLL_NPLL>,
/linux-6.3-rc2/drivers/clk/rockchip/
A Dclk-rk3328.c227 [npll] = PLL(pll_rk3328, PLL_NPLL, "npll", mux_pll_p,
A Dclk-rk3368.c140 [npll] = PLL(pll_rk3066, PLL_NPLL, "npll", mux_pll_p, 0, RK3368_PLL_CON(20),
A Dclk-rk3288.c234 [npll] = PLL(pll_rk3066, PLL_NPLL, "npll", mux_pll_p, 0, RK3288_PLL_CON(16),
A Dclk-px30.c194 [npll] = PLL(pll_rk3328, PLL_NPLL, "npll", mux_pll_p,
A Dclk-rk3399.c229 [npll] = PLL(pll_rk3399, PLL_NPLL, "npll", mux_pll_p, 0, RK3399_PLL_CON(40),
A Dclk-rk3568.c333 [npll] = PLL(pll_rk3328, PLL_NPLL, "npll", mux_pll_p,
A Dclk-rk3588.c679 [npll] = PLL(pll_rk3588, PLL_NPLL, "npll", mux_pll_p,
/linux-6.3-rc2/arch/arm/boot/dts/
A Drk3288.dtsi871 <&cru PLL_NPLL>, <&cru ACLK_CPU>,

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