Home
last modified time | relevance | path

Searched refs:PixelClockBackEnd (Results 1 – 11 of 11) sorted by relevance

/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn32/
A Ddisplay_mode_vba_util_32.h259 double PixelClockBackEnd,
330 double PixelClockBackEnd,
A Ddisplay_mode_vba_util_32.c1346 double PixelClockBackEnd, in dml32_CalculateOutputLink() argument
1406 OutputLinkDPLanes, HTotal, HActive, PixelClockBackEnd, in dml32_CalculateOutputLink()
1415 OutputLinkDPLanes, HTotal, HActive, PixelClockBackEnd, in dml32_CalculateOutputLink()
1428 OutputLinkDPLanes, HTotal, HActive, PixelClockBackEnd, in dml32_CalculateOutputLink()
1438 OutputLinkDPLanes, HTotal, HActive, PixelClockBackEnd, in dml32_CalculateOutputLink()
1451 OutputLinkDPLanes, HTotal, HActive, PixelClockBackEnd, in dml32_CalculateOutputLink()
1459 OutputLinkDPLanes, HTotal, HActive, PixelClockBackEnd, in dml32_CalculateOutputLink()
1474 OutputLinkDPLanes, HTotal, HActive, PixelClockBackEnd, in dml32_CalculateOutputLink()
1498 OutputLinkDPLanes, HTotal, HActive, PixelClockBackEnd, in dml32_CalculateOutputLink()
1523 OutputLinkDPLanes, HTotal, HActive, PixelClockBackEnd, in dml32_CalculateOutputLink()
[all …]
A Ddisplay_mode_vba_32.c349 v->DSCCLK_calculated[k] = mode_lib->vba.PixelClockBackEnd[k] / 12 in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
353 v->DSCCLK_calculated[k] = mode_lib->vba.PixelClockBackEnd[k] / 6 in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
357 v->DSCCLK_calculated[k] = mode_lib->vba.PixelClockBackEnd[k] / 3 in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
371 mode_lib->vba.PixelClockBackEnd[k], mode_lib->vba.ip.dsc_delay_factor_wa); in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2094 mode_lib->vba.PixelClockBackEnd[k], in dml32_ModeSupportAndSystemConfigurationFull()
2411 mode_lib->vba.PixelClockBackEnd[k], in dml32_ModeSupportAndSystemConfigurationFull()
2459 …if (mode_lib->vba.PixelClockBackEnd[k] / 12.0 / mode_lib->vba.DSCFormatFactor > (1.0 - mode_lib->v… in dml32_ModeSupportAndSystemConfigurationFull()
2463 …if (mode_lib->vba.PixelClockBackEnd[k] / 6.0 / mode_lib->vba.DSCFormatFactor > (1.0 - mode_lib->vb… in dml32_ModeSupportAndSystemConfigurationFull()
2466 …if (mode_lib->vba.PixelClockBackEnd[k] / 3.0 / mode_lib->vba.DSCFormatFactor > (1.0 - mode_lib->vb… in dml32_ModeSupportAndSystemConfigurationFull()
2521 mode_lib->vba.PixelClock[k], mode_lib->vba.PixelClockBackEnd[k], in dml32_ModeSupportAndSystemConfigurationFull()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn20/
A Ddisplay_mode_vba_20.c1787 mode_lib->vba.PixelClockBackEnd[k] / 6 in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1794 mode_lib->vba.PixelClockBackEnd[k] / 3 in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1839 / mode_lib->vba.PixelClockBackEnd[k]; in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
4076 * mode_lib->vba.OutputLinkDPLanes[k] / mode_lib->vba.PixelClockBackEnd[k] * 8.0, in dml20_ModeSupportAndSystemConfigurationFull()
4196 if (mode_lib->vba.PixelClockBackEnd[k] / 6.0 / mode_lib->vba.DSCFormatFactor in dml20_ModeSupportAndSystemConfigurationFull()
4202 if (mode_lib->vba.PixelClockBackEnd[k] / 3.0 / mode_lib->vba.DSCFormatFactor in dml20_ModeSupportAndSystemConfigurationFull()
4240 } else if (mode_lib->vba.PixelClockBackEnd[k] > 3200.0) { in dml20_ModeSupportAndSystemConfigurationFull()
4242 mode_lib->vba.PixelClockBackEnd[k] / 400.0, in dml20_ModeSupportAndSystemConfigurationFull()
4244 } else if (mode_lib->vba.PixelClockBackEnd[k] > 1360.0) { in dml20_ModeSupportAndSystemConfigurationFull()
4246 } else if (mode_lib->vba.PixelClockBackEnd[k] > 680.0) { in dml20_ModeSupportAndSystemConfigurationFull()
[all …]
A Ddisplay_mode_vba_20v2.c1823 mode_lib->vba.PixelClockBackEnd[k] / 6 in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1830 mode_lib->vba.PixelClockBackEnd[k] / 3 in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1875 / mode_lib->vba.PixelClockBackEnd[k]; in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
4191 * mode_lib->vba.OutputLinkDPLanes[k] / mode_lib->vba.PixelClockBackEnd[k] * 8.0, in dml20v2_ModeSupportAndSystemConfigurationFull()
4317 if (mode_lib->vba.PixelClockBackEnd[k] / 6.0 / mode_lib->vba.DSCFormatFactor in dml20v2_ModeSupportAndSystemConfigurationFull()
4323 if (mode_lib->vba.PixelClockBackEnd[k] / 3.0 / mode_lib->vba.DSCFormatFactor in dml20v2_ModeSupportAndSystemConfigurationFull()
4361 } else if (mode_lib->vba.PixelClockBackEnd[k] > 3200.0) { in dml20v2_ModeSupportAndSystemConfigurationFull()
4363 mode_lib->vba.PixelClockBackEnd[k] / 400.0, in dml20v2_ModeSupportAndSystemConfigurationFull()
4365 } else if (mode_lib->vba.PixelClockBackEnd[k] > 1360.0) { in dml20v2_ModeSupportAndSystemConfigurationFull()
4367 } else if (mode_lib->vba.PixelClockBackEnd[k] > 680.0) { in dml20v2_ModeSupportAndSystemConfigurationFull()
[all …]
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn21/
A Ddisplay_mode_vba_21.c1779 mode_lib->vba.PixelClockBackEnd[k] / 6 in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1786 mode_lib->vba.PixelClockBackEnd[k] / 3 in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1831 / mode_lib->vba.PixelClockBackEnd[k]; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
4285 * mode_lib->vba.OutputLinkDPLanes[k] / mode_lib->vba.PixelClockBackEnd[k] * 8.0, in dml21_ModeSupportAndSystemConfigurationFull()
4411 if (mode_lib->vba.PixelClockBackEnd[k] / 6.0 / mode_lib->vba.DSCFormatFactor in dml21_ModeSupportAndSystemConfigurationFull()
4417 if (mode_lib->vba.PixelClockBackEnd[k] / 3.0 / mode_lib->vba.DSCFormatFactor in dml21_ModeSupportAndSystemConfigurationFull()
4455 } else if (mode_lib->vba.PixelClockBackEnd[k] > 3200.0) { in dml21_ModeSupportAndSystemConfigurationFull()
4457 mode_lib->vba.PixelClockBackEnd[k] / 400.0, in dml21_ModeSupportAndSystemConfigurationFull()
4459 } else if (mode_lib->vba.PixelClockBackEnd[k] > 1360.0) { in dml21_ModeSupportAndSystemConfigurationFull()
4461 } else if (mode_lib->vba.PixelClockBackEnd[k] > 680.0) { in dml21_ModeSupportAndSystemConfigurationFull()
[all …]
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn30/
A Ddisplay_mode_vba_30.c2126 v->DSCCLK_calculated[k] = v->PixelClockBackEnd[k] / 6 in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2129 v->DSCCLK_calculated[k] = v->PixelClockBackEnd[k] / 3 in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
4037 if (v->PixelClockBackEnd[k] > 3200) { in dml30_ModeSupportAndSystemConfigurationFull()
4039 } else if (v->PixelClockBackEnd[k] > 1360) { in dml30_ModeSupportAndSystemConfigurationFull()
4041 } else if (v->PixelClockBackEnd[k] > 680) { in dml30_ModeSupportAndSystemConfigurationFull()
4043 } else if (v->PixelClockBackEnd[k] > 340) { in dml30_ModeSupportAndSystemConfigurationFull()
4066 v->PixelClockBackEnd[k], in dml30_ModeSupportAndSystemConfigurationFull()
4098 v->PixelClockBackEnd[k], in dml30_ModeSupportAndSystemConfigurationFull()
4118 v->PixelClockBackEnd[k], in dml30_ModeSupportAndSystemConfigurationFull()
4138 v->PixelClockBackEnd[k], in dml30_ModeSupportAndSystemConfigurationFull()
[all …]
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn31/
A Ddisplay_mode_vba_31.c4272 if (v->PixelClockBackEnd[k] > 3200) {
4273 v->NumberOfDSCSlices[k] = dml_ceil(v->PixelClockBackEnd[k] / 400.0, 4.0);
4274 } else if (v->PixelClockBackEnd[k] > 1360) {
4276 } else if (v->PixelClockBackEnd[k] > 680) {
4278 } else if (v->PixelClockBackEnd[k] > 340) {
4301 v->PixelClockBackEnd[k],
4333 v->PixelClockBackEnd[k],
4353 v->PixelClockBackEnd[k],
4373 v->PixelClockBackEnd[k],
4393 v->PixelClockBackEnd[k],
[all …]
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/dcn314/
A Ddisplay_mode_vba_314.c4370 if (v->PixelClockBackEnd[k] > 3200) {
4371 v->NumberOfDSCSlices[k] = dml_ceil(v->PixelClockBackEnd[k] / 400.0, 4.0);
4372 } else if (v->PixelClockBackEnd[k] > 1360) {
4374 } else if (v->PixelClockBackEnd[k] > 680) {
4376 } else if (v->PixelClockBackEnd[k] > 340) {
4399 v->PixelClockBackEnd[k],
4431 v->PixelClockBackEnd[k],
4451 v->PixelClockBackEnd[k],
4471 v->PixelClockBackEnd[k],
4491 v->PixelClockBackEnd[k],
[all …]
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dml/
A Ddisplay_mode_vba.c702 mode_lib->vba.PixelClockBackEnd[mode_lib->vba.NumberOfActivePlanes] = dst->pixel_rate_mhz; in fetch_pipe_params()
1050 mode_lib->vba.PixelClockBackEnd[k] = mode_lib->vba.PixelClock[k]; in PixelClockAdjustmentForProgressiveToInterlaceUnit()
A Ddisplay_mode_vba.h477 double PixelClockBackEnd[DC__NUM_DPP__MAX]; member

Completed in 90 milliseconds