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Searched refs:S3C_ADDR (Results 1 – 3 of 3) sorted by relevance

/linux-6.3-rc2/arch/arm/mach-s3c/
A Dmap-base.h24 #define S3C_ADDR(x) ((void __iomem __force *)S3C_ADDR_BASE + (x)) macro
26 #define S3C_ADDR(x) (S3C_ADDR_BASE + (x)) macro
29 #define S3C_VA_IRQ S3C_ADDR(0x00000000) /* irq controller(s) */
30 #define S3C_VA_SYS S3C_ADDR(0x00100000) /* system control */
31 #define S3C_VA_MEM S3C_ADDR(0x00200000) /* memory control */
32 #define S3C_VA_TIMER S3C_ADDR(0x00300000) /* timer block */
33 #define S3C_VA_WATCHDOG S3C_ADDR(0x00400000) /* watchdog */
34 #define S3C_VA_UART S3C_ADDR(0x01000000) /* UART */
46 #define S3C_ADDR_CPU(x) S3C_ADDR(0x00500000 + (x))
/linux-6.3-rc2/arch/arm/mach-exynos/
A Dexynos.c25 #define S3C_ADDR(x) ((void __iomem __force *)S3C_ADDR_BASE + (x)) macro
26 #define S5P_VA_CHIPID S3C_ADDR(0x02000000)
/linux-6.3-rc2/arch/arm/mach-s5pv210/
A Dregs-clock.h13 #define S3C_ADDR(x) ((void __iomem __force *)S3C_ADDR_BASE + (x)) macro
14 #define S3C_VA_SYS S3C_ADDR(0x00100000)

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