Searched refs:SMEMC_VIRT (Results 1 – 5 of 5) sorted by relevance
13 #define SMEMC_VIRT IOMEM(0xf6000000) macro15 #define MDCNFG (SMEMC_VIRT + 0x00) /* SDRAM Configuration Register 0 */16 #define MDREFR (SMEMC_VIRT + 0x04) /* SDRAM Refresh Control Register */17 #define MSC0 (SMEMC_VIRT + 0x08) /* Static Memory Control Register 0 */18 #define MSC1 (SMEMC_VIRT + 0x0C) /* Static Memory Control Register 1 */19 #define MSC2 (SMEMC_VIRT + 0x10) /* Static Memory Control Register 2 */22 #define SXCNFG (SMEMC_VIRT + 0x1C) /* Synchronous Static Memory Control Register */30 #define MDMRS (SMEMC_VIRT + 0x40) /* MRS value to be written to SDRAM */32 #define MEMCLKCFG (SMEMC_VIRT + 0x68) /* Clock Configuration */33 #define CSADRCFG0 (SMEMC_VIRT + 0x80) /* Address Configuration Register for CS0 */[all …]
32 #define SMEMC_VIRT IOMEM(0xf6000000) macro
160 .virtual = (unsigned long)SMEMC_VIRT,
245 .virtual = (unsigned long)SMEMC_VIRT,
379 .virtual = (unsigned long)SMEMC_VIRT,
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