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Searched refs:SOC15_WAIT_ON_RREG (Results 1 – 10 of 10) sorted by relevance

/linux-6.3-rc2/drivers/gpu/drm/amd/amdgpu/
A Dvcn_v1_0.c1128 SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_LMI_STATUS, tmp, tmp); in vcn_v1_0_stop_spg_mode()
1137 SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_LMI_STATUS, tmp, tmp); in vcn_v1_0_stop_spg_mode()
1169 SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_POWER_STATUS, in vcn_v1_0_stop_dpg_mode()
1175 SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_RB_RPTR, tmp, 0xFFFFFFFF); in vcn_v1_0_stop_dpg_mode()
1178 SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_RB_RPTR2, tmp, 0xFFFFFFFF); in vcn_v1_0_stop_dpg_mode()
1186 SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_POWER_STATUS, in vcn_v1_0_stop_dpg_mode()
1231 ret_code = SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_POWER_STATUS, in vcn_v1_0_pause_dpg_mode()
1239 SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_DPG_PAUSE, in vcn_v1_0_pause_dpg_mode()
1261 SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_POWER_STATUS, in vcn_v1_0_pause_dpg_mode()
1300 SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_DPG_PAUSE, in vcn_v1_0_pause_dpg_mode()
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A Dvcn_v2_0.c722 SOC15_WAIT_ON_RREG(VCN, 0, mmUVD_PGFSM_STATUS, in vcn_v2_0_disable_static_power_gating()
736 SOC15_WAIT_ON_RREG(VCN, 0, mmUVD_PGFSM_STATUS, 0, 0xFFFFF); in vcn_v2_0_disable_static_power_gating()
789 SOC15_WAIT_ON_RREG(VCN, 0, mmUVD_PGFSM_STATUS, data, 0xFFFFF); in vcn_v2_0_enable_static_power_gating()
1110 SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_POWER_STATUS, 1, in vcn_v2_0_stop_dpg_mode()
1115 SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_RB_RPTR, tmp, 0xFFFFFFFF); in vcn_v2_0_stop_dpg_mode()
1118 SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_RB_RPTR2, tmp, 0xFFFFFFFF); in vcn_v2_0_stop_dpg_mode()
1123 SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_POWER_STATUS, 1, in vcn_v2_0_stop_dpg_mode()
1154 r = SOC15_WAIT_ON_RREG(VCN, 0, mmUVD_LMI_STATUS, tmp, tmp); in vcn_v2_0_stop()
1165 r = SOC15_WAIT_ON_RREG(VCN, 0, mmUVD_LMI_STATUS, tmp, tmp); in vcn_v2_0_stop()
1226 SOC15_WAIT_ON_RREG(UVD, 0, mmUVD_DPG_PAUSE, in vcn_v2_0_pause_dpg_mode()
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A Dvcn_v4_0.c549 SOC15_WAIT_ON_RREG(VCN, inst, regUVD_PGFSM_STATUS, in vcn_v4_0_disable_static_power_gating()
634 SOC15_WAIT_ON_RREG(VCN, inst, regUVD_PGFSM_STATUS, data, 0x3F3FFFFF); in vcn_v4_0_enable_static_power_gating()
685 SOC15_WAIT_ON_RREG(VCN, inst, regUVD_CGC_GATE, 0, 0xFFFFFFFF); in vcn_v4_0_disable_clock_gating()
1422 SOC15_WAIT_ON_RREG(VCN, inst_idx, regUVD_POWER_STATUS, 1, in vcn_v4_0_stop_dpg_mode()
1427 SOC15_WAIT_ON_RREG(VCN, inst_idx, regUVD_RB_RPTR, tmp, 0xFFFFFFFF); in vcn_v4_0_stop_dpg_mode()
1429 SOC15_WAIT_ON_RREG(VCN, inst_idx, regUVD_POWER_STATUS, 1, in vcn_v4_0_stop_dpg_mode()
1468 r = SOC15_WAIT_ON_RREG(VCN, i, regUVD_LMI_STATUS, tmp, tmp); in vcn_v4_0_stop()
1478 r = SOC15_WAIT_ON_RREG(VCN, i, regUVD_LMI_STATUS, tmp, tmp); in vcn_v4_0_stop()
1552 SOC15_WAIT_ON_RREG(VCN, inst_idx, regUVD_DPG_PAUSE, in vcn_v4_0_pause_dpg_mode()
1556 SOC15_WAIT_ON_RREG(VCN, inst_idx, regUVD_POWER_STATUS, in vcn_v4_0_pause_dpg_mode()
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A Dvcn_v3_0.c613 SOC15_WAIT_ON_RREG(VCN, inst, mmUVD_PGFSM_STATUS, in vcn_v3_0_disable_static_power_gating()
631 SOC15_WAIT_ON_RREG(VCN, inst, mmUVD_PGFSM_STATUS, 0, 0x3F3FFFFF); in vcn_v3_0_disable_static_power_gating()
734 SOC15_WAIT_ON_RREG(VCN, inst, mmUVD_CGC_GATE, 0, 0xFFFFFFFF); in vcn_v3_0_disable_clock_gating()
1499 SOC15_WAIT_ON_RREG(VCN, inst_idx, mmUVD_POWER_STATUS, 1, in vcn_v3_0_stop_dpg_mode()
1504 SOC15_WAIT_ON_RREG(VCN, inst_idx, mmUVD_RB_RPTR, tmp, 0xFFFFFFFF); in vcn_v3_0_stop_dpg_mode()
1512 SOC15_WAIT_ON_RREG(VCN, inst_idx, mmUVD_POWER_STATUS, 1, in vcn_v3_0_stop_dpg_mode()
1545 r = SOC15_WAIT_ON_RREG(VCN, i, mmUVD_LMI_STATUS, tmp, tmp); in vcn_v3_0_stop()
1555 r = SOC15_WAIT_ON_RREG(VCN, i, mmUVD_LMI_STATUS, tmp, tmp); in vcn_v3_0_stop()
1622 SOC15_WAIT_ON_RREG(VCN, inst_idx, mmUVD_DPG_PAUSE, in vcn_v3_0_pause_dpg_mode()
1663 SOC15_WAIT_ON_RREG(VCN, inst_idx, mmUVD_POWER_STATUS, in vcn_v3_0_pause_dpg_mode()
[all …]
A Dvcn_v2_5.c596 SOC15_WAIT_ON_RREG(VCN, i, mmUVD_CGC_GATE, 0, 0xFFFFFFFF); in vcn_v2_5_disable_clock_gating()
1341 SOC15_WAIT_ON_RREG(VCN, inst_idx, mmUVD_POWER_STATUS, 1, in vcn_v2_5_stop_dpg_mode()
1346 SOC15_WAIT_ON_RREG(VCN, inst_idx, mmUVD_RB_RPTR, tmp, 0xFFFFFFFF); in vcn_v2_5_stop_dpg_mode()
1349 SOC15_WAIT_ON_RREG(VCN, inst_idx, mmUVD_RB_RPTR2, tmp, 0xFFFFFFFF); in vcn_v2_5_stop_dpg_mode()
1354 SOC15_WAIT_ON_RREG(VCN, inst_idx, mmUVD_POWER_STATUS, 1, in vcn_v2_5_stop_dpg_mode()
1386 r = SOC15_WAIT_ON_RREG(VCN, i, mmUVD_LMI_STATUS, tmp, tmp); in vcn_v2_5_stop()
1397 r = SOC15_WAIT_ON_RREG(VCN, i, mmUVD_LMI_STATUS, tmp, tmp); in vcn_v2_5_stop()
1458 SOC15_WAIT_ON_RREG(VCN, inst_idx, mmUVD_DPG_PAUSE, in vcn_v2_5_pause_dpg_mode()
1492 SOC15_WAIT_ON_RREG(VCN, inst_idx, mmUVD_POWER_STATUS, in vcn_v2_5_pause_dpg_mode()
1498 SOC15_WAIT_ON_RREG(VCN, inst_idx, mmUVD_POWER_STATUS, 0x1, in vcn_v2_5_pause_dpg_mode()
[all …]
A Djpeg_v3_0.c274 r = SOC15_WAIT_ON_RREG(JPEG, 0, in jpeg_v3_0_disable_static_power_gating()
309 r = SOC15_WAIT_ON_RREG(JPEG, 0, mmUVD_PGFSM_STATUS, in jpeg_v3_0_enable_static_power_gating()
470 return SOC15_WAIT_ON_RREG(JPEG, 0, mmUVD_JRBC_STATUS, in jpeg_v3_0_wait_for_idle()
A Djpeg_v4_0.c289 r = SOC15_WAIT_ON_RREG(JPEG, 0, in jpeg_v4_0_disable_static_power_gating()
324 r = SOC15_WAIT_ON_RREG(JPEG, 0, regUVD_PGFSM_STATUS, in jpeg_v4_0_enable_static_power_gating()
484 return SOC15_WAIT_ON_RREG(JPEG, 0, regUVD_JRBC_STATUS, in jpeg_v4_0_wait_for_idle()
A Djpeg_v2_0.c215 r = SOC15_WAIT_ON_RREG(JPEG, 0, in jpeg_v2_0_disable_power_gating()
246 r = SOC15_WAIT_ON_RREG(JPEG, 0, mmUVD_PGFSM_STATUS, in jpeg_v2_0_enable_power_gating()
672 ret = SOC15_WAIT_ON_RREG(JPEG, 0, mmUVD_JRBC_STATUS, UVD_JRBC_STATUS__RB_JOB_DONE_MASK, in jpeg_v2_0_wait_for_idle()
A Dsoc15_common.h89 #define SOC15_WAIT_ON_RREG(ip, inst, reg, expected_value, mask) \ macro
A Djpeg_v2_5.c503 ret = SOC15_WAIT_ON_RREG(JPEG, i, mmUVD_JRBC_STATUS, in jpeg_v2_5_wait_for_idle()

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