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Searched refs:VT1724_SPDIF_MASTER (Results 1 – 4 of 4) sorted by relevance

/linux-6.3-rc2/sound/pci/ice1712/
A Denvy24ht.h130 #define VT1724_SPDIF_MASTER 0x10 /* S/PDIF input is master clock */ macro
A Dquartet.c852 outb(val | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE)); in qtet_set_rate()
989 outb(val | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE)); in qtet_init()
A Djuli.c530 outb(val | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE)); in juli_set_rate()
A Dice1724.c89 return (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER) ? 1 : 0; in stdclock_is_spdif_master()
1869 outb(oval | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE)); in stdclock_set_spdif_clock()

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