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/linux-6.3-rc2/drivers/thermal/qcom/
A Dtsens.h117 [_name##_##1] = REG_FIELD(_offset, 1, 1), \
118 [_name##_##2] = REG_FIELD(_offset, 2, 2), \
119 [_name##_##3] = REG_FIELD(_offset, 3, 3), \
120 [_name##_##4] = REG_FIELD(_offset, 4, 4), \
121 [_name##_##5] = REG_FIELD(_offset, 5, 5), \
122 [_name##_##6] = REG_FIELD(_offset, 6, 6), \
123 [_name##_##7] = REG_FIELD(_offset, 7, 7), \
124 [_name##_##8] = REG_FIELD(_offset, 8, 8), \
125 [_name##_##9] = REG_FIELD(_offset, 9, 9), \
131 [_name##_##15] = REG_FIELD(_offset, 15, 15)
[all …]
/linux-6.3-rc2/drivers/clk/bcm/
A Dclk-kona.h93 .offset = (_offset), \
153 .offset = (_offset), \
165 .offset = (_offset), \
176 .offset = (_offset), \
187 .offset = (_offset), \
197 .offset = (_offset), \
213 .offset = (_offset), \
344 .offset = (_offset), \
377 .offset = (_offset), \
436 .offset = (_offset), \
[all …]
/linux-6.3-rc2/drivers/net/ethernet/mellanox/mlxsw/
A Dcore_acl_flex_keys.h57 .offset = _offset, \
66 _element, _offset, _shift, _size)
68 #define MLXSW_AFK_ELEMENT_INFO_BUF(_element, _offset, _size) \ argument
70 _element, _offset, 0, _size)
84 #define MLXSW_AFK_ELEMENT_INST(_type, _element, _offset, \ argument
90 .offset = _offset, \
101 _element, _offset, _shift, _size, 0, false)
103 #define MLXSW_AFK_ELEMENT_INST_EXT_U32(_element, _offset, \ argument
107 _element, _offset, _shift, _size, \
110 #define MLXSW_AFK_ELEMENT_INST_BUF(_element, _offset, _size) \ argument
[all …]
A Ditem.h268 .offset = _offset, \
287 .offset = _offset, \
311 .offset = _offset, \
330 .offset = _offset, \
354 .offset = _offset, \
409 .offset = _offset, \
433 .offset = _offset, \
452 .offset = _offset, \
476 .offset = _offset, \
501 .offset = _offset, \
[all …]
A Dspectrum_acl.c524 #define MLXSW_SP_ACL_MANGLE_ACTION(_htype, _offset, _mask, _shift, _field) \ argument
527 .offset = _offset, \
533 #define MLXSW_SP_ACL_MANGLE_ACTION_IP4(_offset, _mask, _shift, _field) \ argument
535 _offset, _mask, _shift, _field)
537 #define MLXSW_SP_ACL_MANGLE_ACTION_IP6(_offset, _mask, _shift, _field) \ argument
539 _offset, _mask, _shift, _field)
541 #define MLXSW_SP_ACL_MANGLE_ACTION_TCP(_offset, _mask, _shift, _field) \ argument
542 MLXSW_SP_ACL_MANGLE_ACTION(FLOW_ACT_MANGLE_HDR_TYPE_TCP, _offset, _mask, _shift, _field)
544 #define MLXSW_SP_ACL_MANGLE_ACTION_UDP(_offset, _mask, _shift, _field) \ argument
545 MLXSW_SP_ACL_MANGLE_ACTION(FLOW_ACT_MANGLE_HDR_TYPE_UDP, _offset, _mask, _shift, _field)
/linux-6.3-rc2/drivers/clk/renesas/
A Drcar-gen4-cpg.h36 #define DEF_GEN4_SDH(_name, _id, _parent, _offset) \ argument
37 DEF_BASE(_name, _id, CLK_TYPE_GEN4_SDH, _parent, .offset = _offset)
39 #define DEF_GEN4_SD(_name, _id, _parent, _offset) \ argument
40 DEF_BASE(_name, _id, CLK_TYPE_GEN4_SD, _parent, .offset = _offset)
50 #define DEF_GEN4_Z(_name, _id, _type, _parent, _div, _offset) \ argument
51 DEF_BASE(_name, _id, _type, _parent, .div = _div, .offset = _offset)
A Drcar-gen3-cpg.h36 #define DEF_GEN3_SDH(_name, _id, _parent, _offset) \ argument
37 DEF_BASE(_name, _id, CLK_TYPE_GEN3_SDH, _parent, .offset = _offset)
39 #define DEF_GEN3_SD(_name, _id, _parent, _offset) \ argument
40 DEF_BASE(_name, _id, CLK_TYPE_GEN3_SD, _parent, .offset = _offset)
59 #define DEF_GEN3_Z(_name, _id, _type, _parent, _div, _offset) \ argument
60 DEF_BASE(_name, _id, _type, _parent, .div = _div, .offset = _offset)
A Drenesas-cpg-mssr.h53 #define DEF_DIV6P1(_name, _id, _parent, _offset) \ argument
54 DEF_BASE(_name, _id, CLK_TYPE_DIV6P1, _parent, .offset = _offset)
55 #define DEF_DIV6_RO(_name, _id, _parent, _offset, _div) \ argument
56 DEF_BASE(_name, _id, CLK_TYPE_DIV6_RO, _parent, .offset = _offset, .div = _div, .mult = 1)
/linux-6.3-rc2/drivers/clk/tegra/
A Dclk-tegra-periph.c132 #define MUX(_name, _parents, _offset, \ argument
146 #define MUX8(_name, _parents, _offset, \ argument
165 #define INT(_name, _parents, _offset, \ argument
179 #define INT8(_name, _parents, _offset,\ argument
186 #define UART(_name, _parents, _offset,\ argument
193 #define UART8(_name, _parents, _offset,\ argument
200 #define I2C(_name, _parents, _offset,\ argument
217 _offset, 16, 0xE01F, 0, 0, 8, 1, \
248 .offset = _offset, \
842 .offset = _offset,\
[all …]
A Dclk-tegra-audio.c52 #define AUDIO(_name, _offset) \ argument
56 .offset = _offset,\
71 #define AUDIO2X(_name, _num, _offset) \ argument
79 .div_offset = _offset,\
/linux-6.3-rc2/drivers/clk/sunxi-ng/
A Dccu_mult.h17 #define _SUNXI_CCU_MULT_OFFSET_MIN_MAX(_shift, _width, _offset, _min, _max) \ argument
21 .offset = _offset, \
29 #define _SUNXI_CCU_MULT_OFFSET(_shift, _width, _offset) \ argument
30 _SUNXI_CCU_MULT_OFFSET_MIN_MAX(_shift, _width, _offset, 1, 0)
/linux-6.3-rc2/drivers/pinctrl/mediatek/
A Dpinctrl-mtk-common.h109 #define MTK_PIN_DRV_GRP(_pin, _offset, _bit, _grp) \ argument
112 .offset = _offset, \
134 #define MTK_PIN_PUPD_SPEC_SR(_pin, _offset, _pupd, _r1, _r0) \ argument
137 .offset = _offset, \
157 #define MTK_PIN_IES_SMT_SPEC(_start, _end, _offset, _bit) \ argument
162 .offset = _offset, \
/linux-6.3-rc2/drivers/bcma/
A Dsprom.c185 #define SPEX(_field, _offset, _mask, _shift) \ argument
188 #define SPEX32(_field, _offset, _mask, _shift) \ argument
190 sprom[SPOFF(_offset)]) & (_mask)) >> (_shift))
194 SPEX(_field[0], _offset + 0, _mask, _shift); \
195 SPEX(_field[1], _offset + 2, _mask, _shift); \
196 SPEX(_field[2], _offset + 4, _mask, _shift); \
197 SPEX(_field[3], _offset + 6, _mask, _shift); \
198 SPEX(_field[4], _offset + 8, _mask, _shift); \
199 SPEX(_field[5], _offset + 10, _mask, _shift); \
200 SPEX(_field[6], _offset + 12, _mask, _shift); \
[all …]
/linux-6.3-rc2/drivers/video/fbdev/vermilion/
A Dvermilion.h240 #define VML_READ32(_par, _offset) \ argument
241 (ioread32((_par)->vdc_mem + (_offset)))
242 #define VML_WRITE32(_par, _offset, _value) \ argument
243 iowrite32(_value, (_par)->vdc_mem + (_offset))
/linux-6.3-rc2/tools/objtool/include/objtool/
A Delf.h116 #define for_offset_range(_offset, _start, _end) \ argument
117 for (_offset = ((_start) & OFFSET_STRIDE_MASK); \
118 _offset >= ((_start) & OFFSET_STRIDE_MASK) && \
119 _offset <= ((_end) & OFFSET_STRIDE_MASK); \
120 _offset += OFFSET_STRIDE)
/linux-6.3-rc2/arch/riscv/include/asm/
A Dvdso.h23 (void __user *)((unsigned long)(base) + __vdso_##name##_offset)
29 (void __user *)((unsigned long)(base) + compat__vdso_##name##_offset)
/linux-6.3-rc2/tools/testing/selftests/powerpc/nx-gzip/include/
A Dnxu.h428 #define getnn(ST, REG) ((be32toh(ST.REG) >> (31-REG##_offset)) \
430 #define getpnn(ST, REG) ((be32toh((ST)->REG) >> (31-REG##_offset)) \
438 << (31-REG##_offset)))
442 << (31-REG##_offset)))
453 & REG##_mask) << (31-REG##_offset))))
455 | (((X) & REG##_mask) << (31-REG##_offset))))
/linux-6.3-rc2/drivers/pinctrl/berlin/
A Dberlin.h37 #define BERLIN_PINCTRL_GROUP(_name, _offset, _width, _lsb, ...) \ argument
40 .offset = _offset, \
/linux-6.3-rc2/drivers/ssb/
A Dpci.c171 #define SPEX16(_outvar, _offset, _mask, _shift) \ argument
173 #define SPEX32(_outvar, _offset, _mask, _shift) \ argument
175 in[SPOFF(_offset)]) & (_mask)) >> (_shift))
176 #define SPEX(_outvar, _offset, _mask, _shift) \ argument
177 SPEX16(_outvar, _offset, _mask, _shift)
181 SPEX(_field[0], _offset + 0, _mask, _shift); \
182 SPEX(_field[1], _offset + 2, _mask, _shift); \
183 SPEX(_field[2], _offset + 4, _mask, _shift); \
184 SPEX(_field[3], _offset + 6, _mask, _shift); \
185 SPEX(_field[4], _offset + 8, _mask, _shift); \
[all …]
/linux-6.3-rc2/drivers/clk/st/
A Dclkgen.h38 #define CLKGEN_FIELD(_offset, _mask, _shift) { \ argument
39 .offset = _offset, \
/linux-6.3-rc2/net/rxrpc/
A Dinsecure.c21 size_t *_buf_size, size_t *_data_size, size_t *_offset) in none_how_much_data() argument
24 *_offset = 0; in none_how_much_data()
/linux-6.3-rc2/arch/powerpc/boot/
A Dlibfdt-wrapper.c33 unsigned long _offset = (off); \
34 check_err(_offset) ? NULL : (void *)(_offset+1); \
/linux-6.3-rc2/drivers/clk/microchip/
A Dclk-mpfs-ccc.c101 #define CLK_CCC_PLL(_id, _parents, _shift, _width, _flags, _offset) { \ argument
105 .reg_offset = _offset, \
124 #define CLK_CCC_OUT(_id, _shift, _width, _flags, _offset) { \ argument
128 .reg_offset = _offset, \
/linux-6.3-rc2/drivers/clk/stm32/
A Dclk-stm32mp13.c138 #define _CFG_GATE(_id, _offset, _bit_idx, _offset_clr)\ argument
140 .offset = (_offset),\
145 #define CFG_GATE(_id, _offset, _bit_idx)\ argument
146 _CFG_GATE(_id, _offset, _bit_idx, 0)
148 #define CFG_GATE_SETCLR(_id, _offset, _bit_idx)\ argument
149 _CFG_GATE(_id, _offset, _bit_idx, RCC_CLR_OFFSET)
290 .offset = (_offset),\
352 .offset = (_offset),\
359 #define CFG_MUX(_id, _offset, _shift, _witdh)\ argument
362 #define CFG_MUX_SAFE(_id, _offset, _shift, _witdh)\ argument
[all …]
/linux-6.3-rc2/drivers/net/wireless/realtek/rtlwifi/
A Defuse.h74 void read_efuse_byte(struct ieee80211_hw *hw, u16 _offset, u8 *pbuf);
79 void read_efuse(struct ieee80211_hw *hw, u16 _offset,

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