| /linux-6.3-rc2/drivers/clk/mediatek/ |
| A D | clk-mt7981-apmixed.c | 27 #define PLL_xtal(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
31 .id = _id, .name = _name, .reg = _reg, .pwr_reg = _pwr_reg, \
40 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, \ argument
42 PLL_xtal(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \
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| A D | clk-mt7986-apmixed.c | 25 #define PLL_xtal(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
29 .id = _id, .name = _name, .reg = _reg, .pwr_reg = _pwr_reg, \
38 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, \ argument
40 PLL_xtal(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \
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| A D | clk-mt8173-apmixedsys.c | 22 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
28 .pwr_reg = _pwr_reg, \
42 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
45 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \
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| A D | clk-mt8195-apusys_pll.c | 28 #define PLL(_id, _name, _reg, _pwr_reg, _pd_reg, _pcw_reg) { \ argument
32 .pwr_reg = _pwr_reg, \
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| A D | clk-mt6795-apmixedsys.c | 24 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
29 .pwr_reg = _pwr_reg, \
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| A D | clk-mt8195-apmixedsys.c | 31 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
39 .pwr_reg = _pwr_reg, \
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| A D | clk-mt7629.c | 25 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
31 .pwr_reg = _pwr_reg, \
46 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
49 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \
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| A D | clk-mt8186-apmixedsys.c | 18 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
25 .pwr_reg = _pwr_reg, \
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| A D | clk-mt6797.c | 613 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
619 .pwr_reg = _pwr_reg, \
633 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
636 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \
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| A D | clk-mt8516.c | 739 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
745 .pwr_reg = _pwr_reg, \
759 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
762 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \
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| A D | clk-mt7622.c | 25 #define PLL_xtal(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits,\ argument
31 .pwr_reg = _pwr_reg, \
46 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
49 PLL_xtal(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits,\
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| A D | clk-mt8167.c | 985 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
991 .pwr_reg = _pwr_reg, \
1005 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
1008 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \
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| A D | clk-mt6779.c | 1147 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
1155 .pwr_reg = _pwr_reg, \
1174 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
1179 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \
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| A D | clk-mt2712.c | 1167 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
1174 .pwr_reg = _pwr_reg, \
1190 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
1193 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \
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| A D | clk-mt6765.c | 717 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
723 .pwr_reg = _pwr_reg, \
741 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
745 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \
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| A D | clk-mt8183.c | 990 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
998 .pwr_reg = _pwr_reg, \
1017 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
1022 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \
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| A D | clk-mt8192.c | 985 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
993 .pwr_reg = _pwr_reg, \
1013 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
1017 PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \
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| A D | clk-mt8365.c | 764 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
771 .pwr_reg = _pwr_reg, \
790 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
794 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \
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| A D | clk-mt8135.c | 617 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, _pd_shift, _tuner_reg,… argument
621 .pwr_reg = _pwr_reg, \
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| A D | clk-mt2701.c | 941 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, \ argument
946 .pwr_reg = _pwr_reg, \
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