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Searched refs:coreClock (Results 1 – 8 of 8) sorted by relevance

/linux-6.3-rc2/drivers/video/fbdev/kyro/
A DSTG4000InitDevice.c118 u32 coreClock, in ProgramClock() argument
130 coreClock *= 100; /* in Hz */ in ProgramClock()
136 ulMinClock = coreClock - (coreClock >> 8); in ProgramClock()
137 ulMaxClock = coreClock + (coreClock >> 8); in ProgramClock()
140 ulScaleClockReq = coreClock >> STG4K3_PLL_SCALER; in ProgramClock()
179 ((coreClock > STG4K3_PLL_MAXR_VCO) in ProgramClock()
A DSTG4000Interface.h37 extern u32 ProgramClock(u32 refClock, u32 coreClock, u32 *FOut, u32 *ROut, u32 *POut);
/linux-6.3-rc2/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
A Dhardwaremanager.c400 pclock_info->min_eng_clk = performance_level.coreClock; in phm_get_clock_info()
410 pclock_info->max_eng_clk = performance_level.coreClock; in phm_get_clock_info()
A Dsmu10_hwmgr.c1119 level->coreClock = data->gfx_min_freq_limit; in smu10_get_performance_level()
1123 level->coreClock = data->gfx_max_freq_limit; in smu10_get_performance_level()
A Dsmu8_hwmgr.c1612 level->coreClock = ps->levels[level_index].engineClock; in smu8_get_performance_level()
1617 level->coreClock = ps->levels[i].engineClock; in smu8_get_performance_level()
A Dvega10_hwmgr.c5632 level->coreClock = vega10_ps->performance_levels[i].gfx_clock; in vega10_get_performance_level()
A Dsmu7_hwmgr.c5708 level->coreClock = ps->performance_levels[i].engine_clock; in smu7_get_performance_level()
/linux-6.3-rc2/drivers/gpu/drm/amd/pm/powerplay/inc/
A Dhardwaremanager.h272 uint32_t coreClock; member

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