Searched refs:dsaf_read_dev (Results 1 – 7 of 7) sorted by relevance
/linux-6.3-rc2/drivers/net/ethernet/hisilicon/hns/ |
A D | hns_dsaf_gmac.c | 101 porten = dsaf_read_dev(drv, GMAC_PORT_EN_REG); in hns_gmac_get_en() 228 pause_en = dsaf_read_dev(drv, GMAC_PAUSE_EN_REG); in hns_gmac_pause_frm_cfg() 240 pause_en = dsaf_read_dev(drv, GMAC_PAUSE_EN_REG); in hns_gmac_get_pausefrm_cfg() 316 val = dsaf_read_dev(drv, GMAC_FIFO_STATE_REG); in hns_gmac_wait_fifo_clean() 373 += dsaf_read_dev(drv, GMAC_RX_OCTETS_BAD_REG); in hns_gmac_update_stats() 395 += dsaf_read_dev(drv, GMAC_RX_ALIGN_ERRORS_REG); in hns_gmac_update_stats() 397 += dsaf_read_dev(drv, GMAC_RX_LONG_ERRORS_REG); in hns_gmac_update_stats() 415 += dsaf_read_dev(drv, GMAC_RX_OVERRUN_CNT_REG); in hns_gmac_update_stats() 446 += dsaf_read_dev(drv, GMAC_TX_UNDERRUN_REG); in hns_gmac_update_stats() 565 regs[9] = dsaf_read_dev(drv, GMAC_PORT_EN_REG); in hns_gmac_get_regs() [all …]
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A D | hns_dsaf_ppe.c | 40 reg_value = dsaf_read_dev(ppe_cb, in hns_ppe_set_indir_table() 434 += dsaf_read_dev(ppe_cb, PPE_HIS_TX_BD_CNT_REG); in hns_ppe_update_stats() 559 regs[5 + i] = dsaf_read_dev(ppe_common, offset); in hns_ppe_get_regs() 562 = dsaf_read_dev(ppe_common, offset); in hns_ppe_get_regs() 565 = dsaf_read_dev(ppe_common, offset); in hns_ppe_get_regs() 568 = dsaf_read_dev(ppe_common, offset); in hns_ppe_get_regs() 593 regs[540] = dsaf_read_dev(ppe_cb, PPE_INTEN_REG); in hns_ppe_get_regs() 594 regs[541] = dsaf_read_dev(ppe_cb, PPE_RINT_REG); in hns_ppe_get_regs() 626 regs[569] = dsaf_read_dev(ppe_cb, PPE_ECO0_REG); in hns_ppe_get_regs() 627 regs[570] = dsaf_read_dev(ppe_cb, PPE_ECO1_REG); in hns_ppe_get_regs() [all …]
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A D | hns_dsaf_rcb.c | 49 fbd_num += dsaf_read_dev(qs[i], in hns_rcb_wait_fbd_clean() 52 fbd_num += dsaf_read_dev(qs[i], in hns_rcb_wait_fbd_clean() 70 tail = dsaf_read_dev(&qs->tx_ring, RCB_REG_TAIL); in hns_rcb_wait_tx_ring_clean() 73 head = dsaf_read_dev(&qs->tx_ring, RCB_REG_HEAD); in hns_rcb_wait_tx_ring_clean() 111 could_ret = dsaf_read_dev(q, RCB_RING_COULD_BE_RST); in hns_rcb_reset_ring_hw() 120 could_ret = dsaf_read_dev(q, RCB_RING_COULD_BE_RST); in hns_rcb_reset_ring_hw() 578 return dsaf_read_dev(rcb_common, reg); in hns_rcb_get_tx_coalesced_frames() 595 return dsaf_read_dev(rcb_common, in hns_rcb_get_coalesce_usecs() 827 hw_stats->rx_pkts += dsaf_read_dev(queue, in hns_rcb_update_stats() 836 hw_stats->tx_pkts += dsaf_read_dev(queue, in hns_rcb_update_stats() [all …]
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A D | hns_dsaf_main.c | 2317 p[171] = dsaf_read_dev(ddev, in hns_dsaf_get_regs() 2371 p[233] = dsaf_read_dev(ddev, in hns_dsaf_get_regs() 2477 p[396] = dsaf_read_dev(ddev, in hns_dsaf_get_regs() 2479 p[397] = dsaf_read_dev(ddev, in hns_dsaf_get_regs() 2481 p[398] = dsaf_read_dev(ddev, in hns_dsaf_get_regs() 2483 p[399] = dsaf_read_dev(ddev, in hns_dsaf_get_regs() 2485 p[400] = dsaf_read_dev(ddev, in hns_dsaf_get_regs() 2487 p[401] = dsaf_read_dev(ddev, in hns_dsaf_get_regs() 2489 p[402] = dsaf_read_dev(ddev, in hns_dsaf_get_regs() 2491 p[403] = dsaf_read_dev(ddev, in hns_dsaf_get_regs() [all …]
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A D | hns_dsaf_xgmac.c | 491 regs[0] = dsaf_read_dev(drv, XGMAC_INT_STATUS_REG); in hns_xgmac_get_regs() 492 regs[1] = dsaf_read_dev(drv, XGMAC_INT_ENABLE_REG); in hns_xgmac_get_regs() 493 regs[2] = dsaf_read_dev(drv, XGMAC_INT_SET_REG); in hns_xgmac_get_regs() 495 regs[4] = dsaf_read_dev(drv, XGMAC_OVF_INFO_REG); in hns_xgmac_get_regs() 496 regs[5] = dsaf_read_dev(drv, XGMAC_OVF_CNT_REG); in hns_xgmac_get_regs() 497 regs[6] = dsaf_read_dev(drv, XGMAC_PORT_MODE_REG); in hns_xgmac_get_regs() 498 regs[7] = dsaf_read_dev(drv, XGMAC_CLK_ENABLE_REG); in hns_xgmac_get_regs() 499 regs[8] = dsaf_read_dev(drv, XGMAC_RESET_REG); in hns_xgmac_get_regs() 503 regs[11] = dsaf_read_dev(drv, XGMAC_SPARE_REG); in hns_xgmac_get_regs() 504 regs[12] = dsaf_read_dev(drv, XGMAC_SPARE_CNT_REG); in hns_xgmac_get_regs() [all …]
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A D | hns_dsaf_main.h | 407 o_tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG); in hns_dsaf_tbl_tcam_load_pul()
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A D | hns_dsaf_reg.h | 1040 #define dsaf_read_dev(a, reg) \ macro
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