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Searched refs:idxmsk64 (Results 1 – 4 of 4) sorted by relevance

/linux-6.3-rc2/arch/x86/events/intel/
A Dcore.c4224 if (c->idxmsk64 & (1U << 2)) in hsw_get_event_constraints()
4263 if (c->idxmsk64 & BIT_ULL(0)) in spr_get_event_constraints()
4323 c->idxmsk64 &= ~(1ULL << 3); in tfa_get_event_constraints()
4364 switch (c->idxmsk64 & 0x3ull) { in cmt_get_event_constraints()
5790 if (c->idxmsk64 & INTEL_PMC_MSK_TOPDOWN) { in intel_pmu_check_event_constraints()
5796 c->idxmsk64 = 0; in intel_pmu_check_event_constraints()
5797 c->weight = hweight64(c->idxmsk64); in intel_pmu_check_event_constraints()
5803 c->idxmsk64 &= intel_ctrl; in intel_pmu_check_event_constraints()
5810 c->idxmsk64 |= (1ULL << num_counters) - 1; in intel_pmu_check_event_constraints()
5812 c->idxmsk64 &= in intel_pmu_check_event_constraints()
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/linux-6.3-rc2/arch/x86/events/zhaoxin/
A Dcore.c612 c->idxmsk64 |= (1ULL << x86_pmu.num_counters) - 1; in zhaoxin_pmu_init()
/linux-6.3-rc2/arch/x86/events/
A Dperf_event.h54 u64 idxmsk64; member
347 { .idxmsk64 = (n) }, \
A Dcore.c876 if (c->idxmsk64 & (~0ULL << INTEL_PMC_IDX_FIXED)) { in __perf_sched_find_counter()

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