Searched refs:ixMPLL_BYPASSCLK_SEL (Results 1 – 12 of 12) sorted by relevance
| /linux-6.3-rc2/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| A D | polaris_baco.c | 67 { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixMPLL_BYPASSCLK_SEL },
107 { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixMPLL_BYPASSCLK_SEL },
159 { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixMPLL_BYPASSCLK_SEL },
|
| A D | fiji_baco.c | 77 { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixMPLL_BYPASSCLK_SEL },
95 { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixMPLL_BYPASSCLK_SEL },
|
| A D | ci_baco.c | 79 { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixMPLL_BYPASSCLK_SEL },
112 { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixMPLL_BYPASSCLK_SEL },
|
| A D | tonga_baco.c | 77 { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixMPLL_BYPASSCLK_SEL },
103 { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixMPLL_BYPASSCLK_SEL },
|
| /linux-6.3-rc2/drivers/gpu/drm/amd/include/asic_reg/smu/ |
| A D | smu_7_0_0_d.h | 55 #define ixMPLL_BYPASSCLK_SEL 0xc050019c macro
|
| A D | smu_7_1_1_d.h | 55 #define ixMPLL_BYPASSCLK_SEL 0xc050019c macro
|
| A D | smu_7_0_1_d.h | 56 #define ixMPLL_BYPASSCLK_SEL 0xc050019c macro
|
| A D | smu_7_1_2_d.h | 56 #define ixMPLL_BYPASSCLK_SEL 0xc050019c macro
|
| A D | smu_7_1_3_d.h | 59 #define ixMPLL_BYPASSCLK_SEL 0xc050019c macro
|
| A D | smu_7_1_0_d.h | 55 #define ixMPLL_BYPASSCLK_SEL 0xc050019c macro
|
| /linux-6.3-rc2/drivers/gpu/drm/amd/amdgpu/ |
| A D | cik.c | 1848 orig = data = RREG32_SMC(ixMPLL_BYPASSCLK_SEL); in cik_program_aspm()
1852 WREG32_SMC(ixMPLL_BYPASSCLK_SEL, data); in cik_program_aspm()
|
| A D | vi.c | 1245 orig = data = RREG32_SMC(ixMPLL_BYPASSCLK_SEL); in vi_program_aspm()
1249 WREG32_SMC(ixMPLL_BYPASSCLK_SEL, data); in vi_program_aspm()
|
Completed in 52 milliseconds