| /linux-6.3-rc2/drivers/gpu/drm/amd/amdgpu/ |
| A D | amdgpu_gfx.c | 299 struct amdgpu_kiq *kiq = &adev->gfx.kiq; in amdgpu_gfx_kiq_init_ring() local
331 struct amdgpu_kiq *kiq = &adev->gfx.kiq; in amdgpu_gfx_kiq_fini() local
333 amdgpu_bo_free_kernel(&kiq->eop_obj, &kiq->eop_gpu_addr, NULL); in amdgpu_gfx_kiq_fini()
341 struct amdgpu_kiq *kiq = &adev->gfx.kiq; in amdgpu_gfx_kiq_init() local
370 ring = &adev->gfx.kiq.ring; in amdgpu_gfx_mqd_sw_init()
469 struct amdgpu_kiq *kiq = &adev->gfx.kiq; in amdgpu_gfx_disable_kcq() local
473 if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues) in amdgpu_gfx_disable_kcq()
509 struct amdgpu_kiq *kiq = &adev->gfx.kiq; in amdgpu_gfx_enable_kcq() local
514 if (!kiq->pmf || !kiq->pmf->kiq_map_queues || !kiq->pmf->kiq_set_resources) in amdgpu_gfx_enable_kcq()
790 struct amdgpu_kiq *kiq = &adev->gfx.kiq; in amdgpu_kiq_rreg() local
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| A D | mes_v10_1.c | 800 struct amdgpu_kiq *kiq = &adev->gfx.kiq; in mes_v10_1_kiq_enable_queue() local
804 if (!kiq->pmf || !kiq->pmf->kiq_map_queues) in mes_v10_1_kiq_enable_queue()
866 spin_lock_init(&adev->gfx.kiq.ring_lock); in mes_v10_1_kiq_ring_init()
868 ring = &adev->gfx.kiq.ring; in mes_v10_1_kiq_ring_init()
894 ring = &adev->gfx.kiq.ring; in mes_v10_1_mqd_sw_init()
977 amdgpu_bo_free_kernel(&adev->gfx.kiq.ring.mqd_obj, in mes_v10_1_sw_fini()
978 &adev->gfx.kiq.ring.mqd_gpu_addr, in mes_v10_1_sw_fini()
979 &adev->gfx.kiq.ring.mqd_ptr); in mes_v10_1_sw_fini()
985 amdgpu_ring_fini(&adev->gfx.kiq.ring); in mes_v10_1_sw_fini()
1041 mes_v10_1_kiq_setting(&adev->gfx.kiq.ring); in mes_v10_1_kiq_hw_init()
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| A D | mes_v11_0.c | 862 struct amdgpu_kiq *kiq = &adev->gfx.kiq; in mes_v11_0_kiq_enable_queue() local
866 if (!kiq->pmf || !kiq->pmf->kiq_map_queues) in mes_v11_0_kiq_enable_queue()
892 ring = &adev->gfx.kiq.ring; in mes_v11_0_queue_init()
959 spin_lock_init(&adev->gfx.kiq.ring_lock); in mes_v11_0_kiq_ring_init()
961 ring = &adev->gfx.kiq.ring; in mes_v11_0_kiq_ring_init()
987 ring = &adev->gfx.kiq.ring; in mes_v11_0_mqd_sw_init()
1073 &adev->gfx.kiq.ring.mqd_gpu_addr, in mes_v11_0_sw_fini()
1074 &adev->gfx.kiq.ring.mqd_ptr); in mes_v11_0_sw_fini()
1080 amdgpu_ring_fini(&adev->gfx.kiq.ring); in mes_v11_0_sw_fini()
1164 mes_v11_0_kiq_setting(&adev->gfx.kiq.ring); in mes_v11_0_kiq_hw_init()
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| A D | gmc_v11_0.c | 292 if ((adev->gfx.kiq.ring.sched.ready || adev->mes.ring.sched.ready) && in gmc_v11_0_flush_gpu_tlb()
328 struct amdgpu_ring *ring = &adev->gfx.kiq.ring; in gmc_v11_0_flush_gpu_tlb_pasid()
329 struct amdgpu_kiq *kiq = &adev->gfx.kiq; in gmc_v11_0_flush_gpu_tlb_pasid() local
332 spin_lock(&adev->gfx.kiq.ring_lock); in gmc_v11_0_flush_gpu_tlb_pasid()
334 amdgpu_ring_alloc(ring, kiq->pmf->invalidate_tlbs_size + 8); in gmc_v11_0_flush_gpu_tlb_pasid()
335 kiq->pmf->kiq_invalidate_tlbs(ring, in gmc_v11_0_flush_gpu_tlb_pasid()
340 spin_unlock(&adev->gfx.kiq.ring_lock); in gmc_v11_0_flush_gpu_tlb_pasid()
345 spin_unlock(&adev->gfx.kiq.ring_lock); in gmc_v11_0_flush_gpu_tlb_pasid()
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| A D | gmc_v10_0.c | 346 if (adev->gfx.kiq.ring.sched.ready && !adev->enable_mes && in gmc_v10_0_flush_gpu_tlb()
431 struct amdgpu_ring *ring = &adev->gfx.kiq.ring; in gmc_v10_0_flush_gpu_tlb_pasid()
432 struct amdgpu_kiq *kiq = &adev->gfx.kiq; in gmc_v10_0_flush_gpu_tlb_pasid() local
435 spin_lock(&adev->gfx.kiq.ring_lock); in gmc_v10_0_flush_gpu_tlb_pasid()
437 amdgpu_ring_alloc(ring, kiq->pmf->invalidate_tlbs_size + 8); in gmc_v10_0_flush_gpu_tlb_pasid()
438 kiq->pmf->kiq_invalidate_tlbs(ring, in gmc_v10_0_flush_gpu_tlb_pasid()
443 spin_unlock(&adev->gfx.kiq.ring_lock); in gmc_v10_0_flush_gpu_tlb_pasid()
448 spin_unlock(&adev->gfx.kiq.ring_lock); in gmc_v10_0_flush_gpu_tlb_pasid()
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| A D | gmc_v9_0.c | 806 if (adev->gfx.kiq.ring.sched.ready && in gmc_v9_0_flush_gpu_tlb()
916 struct amdgpu_ring *ring = &adev->gfx.kiq.ring; in gmc_v9_0_flush_gpu_tlb_pasid()
917 struct amdgpu_kiq *kiq = &adev->gfx.kiq; in gmc_v9_0_flush_gpu_tlb_pasid() local
932 unsigned int ndw = kiq->pmf->invalidate_tlbs_size + 8; in gmc_v9_0_flush_gpu_tlb_pasid()
935 ndw += kiq->pmf->invalidate_tlbs_size; in gmc_v9_0_flush_gpu_tlb_pasid()
937 spin_lock(&adev->gfx.kiq.ring_lock); in gmc_v9_0_flush_gpu_tlb_pasid()
941 kiq->pmf->kiq_invalidate_tlbs(ring, in gmc_v9_0_flush_gpu_tlb_pasid()
943 kiq->pmf->kiq_invalidate_tlbs(ring, in gmc_v9_0_flush_gpu_tlb_pasid()
948 spin_unlock(&adev->gfx.kiq.ring_lock); in gmc_v9_0_flush_gpu_tlb_pasid()
954 spin_unlock(&adev->gfx.kiq.ring_lock); in gmc_v9_0_flush_gpu_tlb_pasid()
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| A D | amdgpu_virt.c | 77 struct amdgpu_kiq *kiq = &adev->gfx.kiq; in amdgpu_virt_kiq_reg_write_reg_wait() local
78 struct amdgpu_ring *ring = &kiq->ring; in amdgpu_virt_kiq_reg_write_reg_wait()
89 spin_lock_irqsave(&kiq->ring_lock, flags); in amdgpu_virt_kiq_reg_write_reg_wait()
98 spin_unlock_irqrestore(&kiq->ring_lock, flags); in amdgpu_virt_kiq_reg_write_reg_wait()
120 spin_unlock_irqrestore(&kiq->ring_lock, flags); in amdgpu_virt_kiq_reg_write_reg_wait()
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| A D | gfx_v11_0.c | 1255 struct amdgpu_kiq *kiq; in gfx_v11_0_sw_init() local
1391 kiq = &adev->gfx.kiq; in gfx_v11_0_sw_init()
1392 r = amdgpu_gfx_kiq_init_ring(adev, &kiq->ring, &kiq->irq); in gfx_v11_0_sw_init()
3728 struct amdgpu_kiq *kiq = &adev->gfx.kiq; in gfx_v11_0_kiq_enable_kgq() local
3732 if (!kiq->pmf || !kiq->pmf->kiq_map_queues) in gfx_v11_0_kiq_enable_kgq()
4104 ring = &adev->gfx.kiq.ring; in gfx_v11_0_kiq_resume()
4413 struct amdgpu_kiq *kiq = &adev->gfx.kiq; in gfx_v11_0_kiq_disable_kgq() local
4417 if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues) in gfx_v11_0_kiq_disable_kgq()
4428 if (adev->gfx.kiq.ring.sched.ready) in gfx_v11_0_kiq_disable_kgq()
5597 struct amdgpu_kiq *kiq = &adev->gfx.kiq; in gfx_v11_0_ring_preempt_ib() local
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| A D | gfx_v9_0.c | 2014 struct amdgpu_kiq *kiq; in gfx_v9_0_sw_init() local
2164 kiq = &adev->gfx.kiq; in gfx_v9_0_sw_init()
2165 r = amdgpu_gfx_kiq_init_ring(adev, &kiq->ring, &kiq->irq); in gfx_v9_0_sw_init()
3145 adev->gfx.kiq.ring.sched.ready = false; in gfx_v9_0_cp_compute_enable()
3600 ring = &adev->gfx.kiq.ring; in gfx_v9_0_kiq_resume()
3780 adev->gfx.kiq.ring.pipe, in gfx_v9_0_hw_fini()
3781 adev->gfx.kiq.ring.queue, 0); in gfx_v9_0_hw_fini()
3903 struct amdgpu_kiq *kiq = &adev->gfx.kiq; in gfx_v9_0_kiq_read_clock() local
3904 struct amdgpu_ring *ring = &kiq->ring; in gfx_v9_0_kiq_read_clock()
5345 struct amdgpu_kiq *kiq = &adev->gfx.kiq; in gfx_v9_0_ring_preempt_ib() local
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| A D | amdgpu_amdkfd_gfx_v11.c | 263 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq.ring; in hiq_mqd_load_v11()
278 spin_lock(&adev->gfx.kiq.ring_lock); in hiq_mqd_load_v11()
305 spin_unlock(&adev->gfx.kiq.ring_lock); in hiq_mqd_load_v11()
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| A D | amdgpu_amdkfd_gfx_v10.c | 291 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq.ring; in kgd_hiq_mqd_load()
306 spin_lock(&adev->gfx.kiq.ring_lock); in kgd_hiq_mqd_load()
333 spin_unlock(&adev->gfx.kiq.ring_lock); in kgd_hiq_mqd_load()
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| A D | amdgpu_amdkfd_gfx_v9.c | 303 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq.ring; in kgd_gfx_v9_hiq_mqd_load()
318 spin_lock(&adev->gfx.kiq.ring_lock); in kgd_gfx_v9_hiq_mqd_load()
345 spin_unlock(&adev->gfx.kiq.ring_lock); in kgd_gfx_v9_hiq_mqd_load()
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| A D | amdgpu_doorbell.h | 42 uint32_t kiq; member
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| A D | vega10_reg_init.c | 60 adev->doorbell_index.kiq = AMDGPU_DOORBELL64_KIQ; in vega10_doorbell_index_init()
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| A D | gfx_v10_0.c | 4507 struct amdgpu_kiq *kiq; in gfx_v10_0_sw_init() local
4551 &adev->gfx.kiq.irq); in gfx_v10_0_sw_init()
4636 kiq = &adev->gfx.kiq; in gfx_v10_0_sw_init()
4637 r = amdgpu_gfx_kiq_init_ring(adev, &kiq->ring, &kiq->irq); in gfx_v10_0_sw_init()
6525 struct amdgpu_kiq *kiq = &adev->gfx.kiq; in gfx_v10_0_kiq_enable_kgq() local
6529 if (!kiq->pmf || !kiq->pmf->kiq_map_queues) in gfx_v10_0_kiq_enable_kgq()
6886 ring = &adev->gfx.kiq.ring; in gfx_v10_0_kiq_resume()
7244 struct amdgpu_kiq *kiq = &adev->gfx.kiq; in gfx_v10_0_kiq_disable_kgq() local
7248 if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues) in gfx_v10_0_kiq_disable_kgq()
8650 struct amdgpu_kiq *kiq = &adev->gfx.kiq; in gfx_v10_0_ring_preempt_ib() local
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| A D | amdgpu_amdkfd_gfx_v10_3.c | 278 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq.ring; in hiq_mqd_load_v10_3()
293 spin_lock(&adev->gfx.kiq.ring_lock); in hiq_mqd_load_v10_3()
320 spin_unlock(&adev->gfx.kiq.ring_lock); in hiq_mqd_load_v10_3()
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| A D | vega20_reg_init.c | 60 adev->doorbell_index.kiq = AMDGPU_VEGA20_DOORBELL_KIQ; in vega20_doorbell_index_init()
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| A D | amdgpu_gfx.h | 288 struct amdgpu_kiq kiq; member
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| A D | gfx_v8_0.c | 1904 struct amdgpu_kiq *kiq; in gfx_v8_0_sw_init() local
2024 kiq = &adev->gfx.kiq; in gfx_v8_0_sw_init()
2025 r = amdgpu_gfx_kiq_init_ring(adev, &kiq->ring, &kiq->irq); in gfx_v8_0_sw_init()
2054 amdgpu_gfx_kiq_free_ring(&adev->gfx.kiq.ring); in gfx_v8_0_sw_fini()
4295 adev->gfx.kiq.ring.sched.ready = false; in gfx_v8_0_cp_compute_enable()
4317 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq.ring; in gfx_v8_0_kiq_kcq_enable()
4669 WREG32(mmCP_MEC_DOORBELL_RANGE_LOWER, adev->doorbell_index.kiq << 2); in gfx_v8_0_set_mec_doorbell_range()
4681 ring = &adev->gfx.kiq.ring; in gfx_v8_0_kiq_resume()
4744 ring = &adev->gfx.kiq.ring; in gfx_v8_0_cp_test_all_rings()
4811 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq.ring; in gfx_v8_0_kcq_disable()
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| A D | soc21.c | 503 adev->doorbell_index.kiq = AMDGPU_NAVI10_DOORBELL_KIQ; in soc21_init_doorbell_index()
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| A D | nv.c | 650 adev->doorbell_index.kiq = AMDGPU_NAVI10_DOORBELL_KIQ; in nv_init_doorbell_index()
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| A D | vi.c | 2241 adev->doorbell_index.kiq = AMDGPU_DOORBELL_KIQ; in legacy_doorbell_index_init()
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